Datasheet Atmel AT90S1200-4YC — 数据表

Features
• Utilizes the AVR® RISC Architecture
• AVR - High-performance and Low-power RISC Architecture • • • •
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• - 89 Powerful Instructions - Most Single Clock Cycle Execution
- 32 x 8 General Purpose Working Registers
- Up to 12 MIPS Throughput at 12 MHz
Data and Non-volatile Program Memory
- 1K Byte of In-System Programmable Flash
Endurance: 1,000 Write/Erase Cycles
- 64 Bytes of In-System Programmable EEPROM
Endurance: 100,000 Write/Erase Cycles
- Programming Lock for Flash Program and EEPROM Data Security
Peripheral Features
- One 8-bit Timer/Counter with Separate Prescaler
- On-chip Analog Comparator
- Programmable Watchdog Timer with On-chip Oscillator
- SPI Serial Interface for In-System Programming
Special Microcontroller Features
- Low-power Idle and Power-down Modes
- External and Internal Interrupt Sources
- Selectable On-chip RC Oscillator for Zero External Components …