Datasheet Actel A1010B-2PLG68I — 数据表

ACT^TM 1 Series FPGAs
Features • 5V and 3.3V Families fully compatible with JEDEC
specifications A security fuse may be programmed to disable all further
programming and to protect the design from being copied or
reverse engineered. • Up to 2000 Gate Array Gates (6000 PLD equivalent gates) Product Family Profile • Replaces up to 50 TTL Packages A1010B
A10V10B A1020B
A10V20B 1,200
3,000
30
12 2,000
6,000
50
20 Logic Modules 295 547 • Data Rates to 75 MHz Flip-Flops (maximum) 147 273 • Two In-Circuit Diagnostic Probe Pins Support Speed
Analysis to 25 MHz
• Built-In High Speed Clock Distribution Network Routing Resources
Horizontal Tracks/Channel
Vertical Tracks/Column
PLICE Antifuse Elements 22
13
112,000 22
13
186,000 • I/O Drive to 10 mA (5 V), 6 mA (3.3 V) User I/Os (maximum) 57 69 • Nonvolatile, User Programmable Packages: • Replaces up to twenty 20-Pin PAL® Packages Device • Design Library with over 250 Macro Functions • Up to 547 Programmable Logic Modules Capacity
Gate Array Equivalent Gates …