Datasheet Texas Instruments CD4053BMT — 数据表

具有逻辑电平转换的CMOS三路2通道模拟多路复用器/多路解复用器-55至125

数据表

PDF, 1.4 Mb, 修订版: I, 档案已发布: Aug 31, 2017

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Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

Additional Features	Control logic voltage translation,Dual supply,Break-before-make
Bandwidth	30 MHz
Bandwidth(Max)	30 MHz
Configuration	2:1 SPDT
ESD Charged Device Model	1.5 kV
ESD HBM	2.5 kV
Input/Ouput Voltage(Max)	20 V
Input/Ouput Voltage(Min)	-10 V
Input/Output Continuous Current(Max)	10 mA
Number of Channels	3
Operating Temperature Range	-55 to 125 C
Package Group	SOIC
Package Size: mm2:W x L	16SOIC: 59 mm2: 6 x 9.9(SOIC) PKG
Rating	Catalog
Ron(Max)	1300 Ohms
Ron(Typ)	125 Ohms
Supply Current(Max)	3000 uA
Supply Current(Typ)	0.04 uA
Supply Range	20 Max
VIH(Min)	vcc*.7 V
VIL(Max)	vcc*.3 V
Vdd(Max)	20 V
Vdd(Min)	5 V
Vss(Min)	-10 V

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Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics
PDF, 188 Kb, 档案已发布: Dec 3, 2001
Both buffered and unbuffered CMOS B-series gates inverters and high-current IC products are available from TI. Each product classification has application advantages in appropriate logic-system designs. Many CMOS suppliers have concentrated on promoting buffered B-series products with applications literature focusing on the attributes and use of the buffered types. This practice has left an imb

系列: CD4053B (16)