Datasheet NXP LPC812M101JD20 — 数据表

LPC81xM
32-bit ARM Cortex-M0+ microcontroller; up to 16 kB flash and 4 kB SRAM
Rev. 4.4 -23 June 2015 Product data sheet 1. General description
The LPC81xM are an ARM Cortex-M0+ based, low-cost 32-bit MCU family operating at CPU frequencies of up to 30 MHz. The LPC81xM support up to 16 kB of flash memory and 4 kB of SRAM. The peripheral complement of the LPC81xM includes a CRC engine, one I2C-bus interface, up to three USARTs, up to two SPI interfaces, one multi-rate timer, self wake-up timer, and state-configurable timer, one comparator, function-configurable I/O ports through a switch matrix, an input pattern match engine, and up to 18 general-purpose I/O pins. 2. Features and benefits System: ARM Cortex-M0+ processor, running at frequencies of up to 30 MHz with single-cycle multiplier and fast single-cycle I/O port. ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC). System tick timer. Serial Wire Debug (SWD) and JTAG boundary scan modes supported. Micro Trace Buffer (MTB) supported. Memory: Up to 16 kB on-chip flash programming memory with 64 Byte page write and erase. Up to 4 kB SRAM. ROM API support: Boot loader. USART drivers. I2C drivers. Power profiles. Flash In-Application Programming (IAP) and In-System Programming (ISP). Digital peripherals: High-speed GPIO interface connected to the ARM Cortex-M0+ IO bus with up to 18 General-Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors, programmable open-drain mode, input inverter, and glitch filter. High-current source output driver (20 mA) on four pins. High-current sink driver (20 mA) on two true open-drain pins. GPIO interrupt generation capability with boolean pattern-matching feature on eight GPIO inputs. Switch matrix for flexible configuration of each I/O pin function. NXP Semiconductors LPC81xM
32-bit ARM Cortex-M0+ microcontroller State Configurable Timer/PWM (SCTimer/PWM) with input and output functions (including capture and match) assigned to pins through the switch matrix. Multiple-channel multi-rate timer (MRT) for repetitive interrupt generation at up to four programmable, fixed rates. Self Wake-up Timer (WKT) clocked from either the IRC or a low-power, low-frequency internal oscillator. CRC engine. Windowed Watchdog timer (WWDT). Analog peripherals: Comparator with internal and external voltage references with pin functions assigned or enabled through the switch matrix. Serial interfaces: Three USART interfaces with pin functions assigned through the switch matrix. Two SPI controllers with pin functions assigned through the switch matrix. One I2C-bu …