Datasheet Texas Instruments TPS62085RLTT — 数据表

制造商Texas Instruments
系列TPS62085
零件号TPS62085RLTT
Datasheet Texas Instruments TPS62085RLTT

采用2x2 HotRod封装,具有DCS控制和打cup短路保护功能的3A降压转换器7-VSON-HR -40至125

数据表

TPS6208x 3-A Step-Down Converter With Hiccup Short-Circuit Protection In 2 Г— 2 QFN Package datasheet
PDF, 1.1 Mb, 修订版: A, 档案已发布: Jun 25, 2015
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityYes

打包

Pin7
Package TypeRLT
Industry STD TermVSON-HR
JEDEC CodeS-PQFP-N
Package QTY250
CarrierSMALL T&R
Device MarkingPD5Q
Width (mm)2
Length (mm)2
Thickness (mm).9
Pitch (mm).5
Max Height (mm)1
Mechanical Data下载

参数化

Control ModeConstant on-time (COT)
Duty Cycle(Max)100 %
Iout(Max)3 A
Iq(Typ)0.017 mA
Operating Temperature Range-40 to 125 C
Package GroupVSON-HR
RatingCatalog
Regulated Outputs1
Special FeaturesEnable,Light Load Efficiency,Output Discharge,Power Good,Synchronous Rectification
Switching Frequency(Max)2400 kHz
Switching Frequency(Min)2400 kHz
TypeConverter
Vin(Max)6 V
Vin(Min)2.5 V
Vout(Max)6 V
Vout(Min)0.8 V

生态计划

RoHSCompliant

设计套件和评估模块

  • Evaluation Modules & Boards: TPS62085EVM-169
    TPS62085EVM-169 3-A Step-Down Converter with DCS-Control and Hiccup Short Circuit Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: ADC32RF44EVM
    ADC32RF44 Dual-Channel, 14-Bit, 2.6GSPS, RF-Sampling ADC Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: ADC32RF42EVM
    ADC32RF42 Dual-Channel, 14-Bit, 1.5GSPS, RF-Sampling ADC Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: ADS58J64EVM
    ADS58J64 Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: ADC32RF82EVM
    ADC32RF82 Dual-Channel, 14-Bit, 2.45GSPS Telecom Receiver and Feedback IC Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: DAC38RF89EVM
    DAC38RF89 Dual-Channel, 14-Bit, 8.4GSPS, 1x-24x Interpolating, 5 & 7.5 GHz PLL DAC Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: DAC38RF86EVM
    DAC38RF86 Dual-Channel, 14-Bit, 9-GSPS, 6x-24x Interpolating, 9 GHz GSM PLL DAC Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: DAC38RF87EVM
    DAC38RF87 Dual-Channel, 14-Bit, 6.2-GSPS, 6x-24x Interpolating, 6-GHz GSM PLL DAC Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: DAC38RF80EVM
    DAC38RF80 Dual-Channel, 14-Bit, 9-GSPS, 6x-24x Interpolating, 6 & 9 GHz PLL DAC Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: DAC38RF82EVM
    DAC38RF82 Dual-Channel, 14-Bit, 9-GSPS, 1x-24x Interpolating, 6 & 9 GHz PLL DAC Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

应用须知

  • Analog Applications Journal 4Q 2014
    PDF, 1.8 Mb, 档案已发布: Oct 24, 2014
  • Power-supply sequencing for FPGAs
    PDF, 771 Kb, 档案已发布: Oct 24, 2014
  • How to Measure the Control Loop of DCS-Control Devices (Rev. A)
    PDF, 259 Kb, 修订版: A, 档案已发布: Aug 9, 2012
  • High-efficiency low-ripple DCS-Control offers seamless PWM/pwr-save transitions
    PDF, 605 Kb, 档案已发布: Jul 25, 2013
  • Understanding frequency variation in the DCS-Control(TM) topology
    PDF, 224 Kb, 档案已发布: Oct 30, 2015
  • Design considerations for a resistive feedback divider in a DC/DC converter
    PDF, 393 Kb, 档案已发布: Apr 26, 2012
  • Five steps to a great PCB layout for a step-down converter
    PDF, 162 Kb, 档案已发布: Jan 29, 2015
  • Understanding the Absolute Maximum Ratings of the SW Node (Rev. A)
    PDF, 755 Kb, 修订版: A, 档案已发布: Jan 13, 2012
  • Testing tips for applying external power to supply outputs without an input volt
    PDF, 110 Kb, 档案已发布: Oct 24, 2016
  • Basic Calculation of a Buck Converter's Power Stage (Rev. B)
    PDF, 202 Kb, 修订版: B, 档案已发布: Aug 17, 2015
  • Extending the Soft Start Time Without a Soft Start Pin (Rev. B)
    PDF, 387 Kb, 修订版: B, 档案已发布: Jun 15, 2017
  • Choosing an Appropriate Pull-up/Pull-down Resistor for Open Drain Outputs
    PDF, 130 Kb, 档案已发布: Sep 19, 2011
  • QFN and SON PCB Attachment (Rev. B)
    PDF, 821 Kb, 修订版: B, 档案已发布: Aug 24, 2018
  • IQ: What it is what it isn’t and how to use it
    PDF, 198 Kb, 档案已发布: Jun 17, 2011
  • Performing Accurate PFM Mode Efficiency Measurements (Rev. A)
    PDF, 418 Kb, 修订版: A, 档案已发布: Dec 11, 2018
    When performing measurements on DC-DC converters using pulse frequency modulation(PFM)or any power save mode proper care must be taken to ensure that the measurements are accurate. An accurate PFM mode efficiency measurement is critical for systems which require high efficiency at low loads such as in smart home systems tablets wearables and metering.

模型线

系列: TPS62085 (2)

制造商分类

  • Semiconductors > Power Management > Non-isolated DC/DC Switching Regulator > Step-Down (Buck) > Buck Converter (Integrated Switch)