Datasheet Analog Devices AD842JNZ — 数据表

REVISIONS
LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with N.O.R. 5962-R074-93. 93-04-06 M. A. FRYE B Changes in accordance with N.O.R. 5962-R003-94. 94-01-03 M. A. FRYE C Drawing updated to reflect current requirements. -ro 01-04-11 R. MONNIN D Update drawing as part of 5 year review. -rrp 08-02-05 R. HEBER E Update drawing to current MIL-PRF-38535 requirements. -rrp 15-06-18 C. SAFFLE THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED.
REV
SHEET
REV
SHEET
REV STATUS REV E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY
RICK C. OFFICER STANDARD
MICROCIRCUIT
DRAWING DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil CHECKED BY
CHARLES E. BESORE
APPROVED BY THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE AMSC N/A MICHAEL A. FRYE
DRAWING APPROVAL DATE
92-07-16 REVISION LEVEL
E MICROCIRCUIT, LINEAR, WIDEBAND, HIGH
OUTPUT CURRENT, FAST SETTLING,
OPERATIONAL AMPLIFIER, MONOLITHIC …

Wideband, High Output Current
Fast Settling Op Amp
AD842 Data Sheet CONNECTION DIAGRAMS AC performance
Gain bandwidth product: 80 MHz (gain = 2)
Fast settling: 100 ns to 0.01% for a 10 V step
Slew rate: 375 V/µs
Stable at gains of 2 or greater
Full power bandwidth: 6 MHz for 20 V p-p
DC performance
Input offset voltage: 1.5 mV maximum
Input offset drift: 14 µV/°C
Input voltage noise: 9 nV/√Hz
Open-loop gain: 90 V/mV into a 499 Ω load
Output current: 100 mA minimum
Quiescent supply current: 14 mA maximum NIC 1 NIC 2 BALANCE
–INPUT
+INPUT 5 V–
NIC 14 NIC 13 BALANCE 3 12 NIC 4 11 V+ 10 OUTPUT 6 9 NIC 7 (Not to Scale) 8 NIC AD842 TOP VIEW + 09477-001 FEATURES NOTES
1. NIC = NOT INTERNALLY CONNECTED. Figure 1. PDIP (N-14) and CERDIP (Q-14) 2 –INPUT 3 APPLICATIONS AD842 16 NIC
TOP VIEW
15 BALANCE
(Not to Scale)
14 +VS NIC 4 13 NIC +INPUT 5 12 OUTPUT 11 NIC 7 10 NIC NIC 8 9 NIC + NIC 6 Line drivers …