Datasheet Texas Instruments THS4031CDR — 数据表
| 制造商 | Texas Instruments |
| 系列 | THS4031 |
| 零件号 | THS4031CDR |
100MHz低噪声电压反馈放大器8-SOIC 0至70
数据表
THS403x 100-MHz Low-Noise High-Speed Amplifiers datasheet
PDF, 1.6 Mb, 修订版: H, 档案已发布: Jun 30, 2016
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 8 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2500 |
| Carrier | LARGE T&R |
| Device Marking | 4031C |
| Width (mm) | 3.91 |
| Length (mm) | 4.9 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | 下载 |
参数化
| 2nd Harmonic | 81 dBc |
| 3rd Harmonic | 81 dBc |
| @ MHz | 1 |
| Acl, min spec gain | 1 V/V |
| Additional Features | N/A |
| Architecture | Bipolar,Voltage FB |
| BW @ Acl | 200 MHz |
| CMRR(Min) | 85 dB |
| CMRR(Typ) | 95 dB |
| GBW(Typ) | 200 MHz |
| Input Bias Current(Max) | 6000000 pA |
| Iq per channel(Max) | 10 mA |
| Iq per channel(Typ) | 8.5 mA |
| Number of Channels | 1 |
| Offset Drift(Typ) | 2 uV/C |
| Operating Temperature Range | -40 to 85,0 to 70 C |
| Output Current(Typ) | 90 mA |
| Package Group | SOIC |
| Package Size: mm2:W x L | 8SOIC: 29 mm2: 6 x 4.9(SOIC) PKG |
| Rail-to-Rail | No |
| Rating | Catalog |
| Slew Rate(Typ) | 100 V/us |
| Total Supply Voltage(Max) | 30 +5V=5, +/-5V=10 |
| Total Supply Voltage(Min) | 10 +5V=5, +/-5V=10 |
| Vn at 1kHz(Typ) | 1.6 nV/rtHz |
| Vn at Flatband(Typ) | 1.6 nV/rtHz |
| Vos (Offset Voltage @ 25C)(Max) | 2 mV |
生态计划
| RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: THS4031EVM
THS4031 High Speed Amplifier Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
应用须知
- Accurately measuring ADC driving-circuit settling time (Rev. A)PDF, 107 Kb, 修订版: A, 档案已发布: May 18, 2015
- Low Power Input and Reference Driver Circuit for ADS8318 and ADS8319PDF, 1.5 Mb, 档案已发布: Jun 24, 2009
The one size fits all approach to operational amplifiers is not effective. Every application has its own specific requirements that must be fulfilled. Appropriate selection of the op amp that drives an analog-to-digital converter (ADC) in a low-power application is a critical step. Most available low-power op amps trade off low-power features with other parameters such as bandwidth, settling t - Wideband Complementary Current Output DAC Single-Ended InterfacePDF, 597 Kb, 档案已发布: Jun 21, 2005
High-speed digital-to-analog converters (DACs) most often use a transformer-coupled output stage. In applications where this configuration is not practical, a single op ampdifferential to single-ended stage has often been used. This application note steps through the exact design equations required to achieve gain matching from each output as well as a matched input impedance to each of the DA - Noise Analysis for High Speed Op Amps (Rev. A)PDF, 256 Kb, 修订版: A, 档案已发布: Jan 17, 2005
As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu
模型线
系列: THS4031 (14)
制造商分类
- Semiconductors > Amplifiers > Operational Amplifiers (Op Amps) > High-Speed Op Amps (>=50MHz)