Datasheet Texas Instruments ADS8506IBDWR — 数据表
| 制造商 | Texas Instruments |
| 系列 | ADS8506 |
| 零件号 | ADS8506IBDWR |
带串行接口和参考并行28-SOIC的12位40KSPS模数转换器-40至85
数据表
12-Bit 40-KSPS Low Power Sampling A/D Converter w/IR & Parallel/Serial Interface datasheet
PDF, 1.0 Mb, 修订版: B, 档案已发布: Dec 4, 2007
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 28 | 28 |
| Package Type | DW | DW |
| Industry STD Term | SOIC | SOIC |
| JEDEC Code | R-PDSO-G | R-PDSO-G |
| Package QTY | 1000 | 1000 |
| Carrier | LARGE T&R | LARGE T&R |
| Device Marking | B | ADS8506I |
| Width (mm) | 7.5 | 7.5 |
| Length (mm) | 17.9 | 17.9 |
| Thickness (mm) | 2.35 | 2.35 |
| Pitch (mm) | 1.27 | 1.27 |
| Max Height (mm) | 2.65 | 2.65 |
| Mechanical Data | 下载 | 下载 |
参数化
| # Input Channels | 1 |
| Analog Voltage AVDD(Max) | 5.25 V |
| Analog Voltage AVDD(Min) | 4.75 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.25 V |
| Digital Supply(Min) | 4.75 V |
| INL(Max) | 0.45 +/-LSB |
| Input Range(Max) | 10 V |
| Input Range(Min) | -10 V |
| Input Type | Single-Ended |
| Integrated Features | Daisy-Chainable,Oscillator |
| Interface | Parallel,SPI |
| Multi-Channel Configuration | N/A |
| Operating Temperature Range | -40 to 85 C |
| Package Group | SOIC |
| Package Size: mm2:W x L | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) PKG |
| Power Consumption(Typ) | 155 mW |
| Rating | Catalog |
| Reference Mode | Ext,Int |
| Resolution | 12 Bits |
| SINAD | 73.9 dB |
| SNR | 74 dB |
| Sample Rate (max) | 40kSPS SPS |
| Sample Rate(Max) | 0.04 MSPS |
| THD(Typ) | -96 dB |
生态计划
| RoHS | Compliant |
应用须知
- Upgrading From ADS7806/07 To ADS8506/07 Devices (Rev. B)PDF, 88 Kb, 修订版: B, 档案已发布: Nov 27, 2007
The information in this application report is for current applications using the Texas Instruments ADS7806/07 devices in a surface-mount SO-28 (DW) package. This document helps users with ADS78xx devices through potential compatibility issues when upgrading to the new ADS85xx part series. - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
模型线
系列: ADS8506 (6)
- ADS8506IBDW ADS8506IBDWG4 ADS8506IBDWR ADS8506IDW ADS8506IDWG4 ADS8506IDWR
制造商分类
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)