Datasheet Texas Instruments TLV5624IDGK — 数据表
制造商 | Texas Instruments |
系列 | TLV5624 |
零件号 | TLV5624IDGK |
8位1.0至3.5 us DAC,串行输入,可编程内部参考,建立时间8-VSSOP -40至85
数据表
TLV5624 - 2.7 V To 5.5 V Low Power 8-Bit DAC w/ Internal Ref And Power Down datasheet
PDF, 969 Kb, 修订版: B, 档案已发布: Apr 8, 2004
从文件中提取
价格
状态
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | Yes |
打包
Pin | 8 |
Package Type | DGK |
Industry STD Term | VSSOP |
JEDEC Code | R-PDSO-G |
Package QTY | 80 |
Carrier | TUBE |
Device Marking | ADS |
Width (mm) | 3 |
Length (mm) | 3 |
Thickness (mm) | .97 |
Pitch (mm) | .65 |
Max Height (mm) | 1.07 |
Mechanical Data | 下载 |
参数化
Code to Code Glitch(Typ) | 5 nV-sec |
DAC Architecture | String |
DAC Channels | 1 |
Gain Error(Max) | 0.6 %FSR |
INL(Max) | 0.5 +/-LSB |
Interface | SPI |
Offset Error(Max) | N/A % |
Operating Temperature Range | -40 to 85,0 to 70 C |
Output Range Max. | 5.1 mA/V |
Output Type | Buffered Voltage |
Package Group | VSSOP |
Package Size: mm2:W x L | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) PKG |
Power Consumption(Typ) | 0.9 mW |
Rating | Catalog |
Reference: Type | Ext,Int |
Resolution | 8 Bits |
Sample / Update Rate | 0.233 MSPS |
Settling Time | 1 µs |
Special Features | N/A |
Zero Code Error(Typ) | 20 mV |
生态计划
RoHS | Compliant |
模型线
系列: TLV5624 (12)
制造商分类
- Semiconductors > Data Converters > Digital-to-Analog Converters (DACs) > Precision DACs (=<10MSPS)