Datasheet Texas Instruments CD74ACT238E — 数据表

3线至8线同相解码器/解复用器16-PDIP -55至125

数据表

PDF, 227 Kb, 档案已发布: Feb 21, 2003

从文件中提取

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

Bandwidth	100 MHz
Bits	8
Number of Channels	1
Configuration	3:8
Digital input leakage(Max)	5 uA
ESD Charged Device Model	0.75 kV
ESD HBM	2 kV
F @ Nom Voltage(Max)	90 Mhz
Function	Decoder/Demultiplexer
ICC @ Nom Voltage(Max)	0.08 mA
Operating Temperature Range	-55 to 125 C
Output Drive (IOL/IOH)(Max)	24/-24 mA
Package Group	PDIP
Package Size: mm2:W x L	See datasheet (PDIP) PKG
Rating	Catalog
Schmitt Trigger	No
Technology Family	ACT
Type	Standard
VCC(Max)	5.5 V
VCC(Min)	4.5 V
Voltage(Nom)	5 V
tpd @ Nom Voltage(Max)	14.2 ns

RoHS	Compliant
Pb Free	Yes

下载
Selecting the Right Level Translation Solution (Rev. A)
PDF, 313 Kb, 修订版: A, 档案已发布: Jun 22, 2004
Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati
下载
Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
PDF, 43 Kb, 档案已发布: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

系列: CD74ACT238 (1)