Datasheet Texas Instruments OPA4684IDG4 — 数据表
| 制造商 | Texas Instruments |
| 系列 | OPA4684 |
| 零件号 | OPA4684IDG4 |
四路低功耗电流反馈运算放大器14-SOIC -40至85
数据表
Quad, Low-Power, Current-Feedback Operational Amplifier datasheet
PDF, 1.1 Mb, 修订版: G, 档案已发布: Jul 2, 2008
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 14 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 50 |
| Carrier | TUBE |
| Device Marking | OPA4684 |
| Width (mm) | 3.91 |
| Length (mm) | 8.65 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | 下载 |
参数化
| 2nd Harmonic | 67 dBc |
| 3rd Harmonic | 70 dBc |
| @ MHz | 5 |
| Acl, min spec gain | 1 V/V |
| Additional Features | Shutdown |
| Architecture | Bipolar,Current FB |
| BW @ Acl | 210 MHz |
| CMRR(Min) | 53 dB |
| CMRR(Typ) | 60 dB |
| GBW(Typ) | 210 MHz |
| Input Bias Current(Max) | 10000000 pA |
| Iq per channel(Max) | 1.8 mA |
| Iq per channel(Typ) | 1.7 mA |
| Number of Channels | 4 |
| Offset Drift(Typ) | 12 uV/C |
| Operating Temperature Range | -40 to 85 C |
| Output Current(Typ) | 120 mA |
| Package Group | SOIC |
| Package Size: mm2:W x L | 14SOIC: 52 mm2: 6 x 8.65(SOIC) PKG |
| Rail-to-Rail | No |
| Rating | Catalog |
| Slew Rate(Typ) | 820 V/us |
| Total Supply Voltage(Max) | 12 +5V=5, +/-5V=10 |
| Total Supply Voltage(Min) | 5 +5V=5, +/-5V=10 |
| Vn at 1kHz(Typ) | 3.7 nV/rtHz |
| Vn at Flatband(Typ) | 3.7 nV/rtHz |
| Vos (Offset Voltage @ 25C)(Max) | 3.5 mV |
生态计划
| RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: DEM-OPA468XD
DEM-OPA468xD: Demonstration Board
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: DEM-OPA468XPW
DEM-OPA468xPW: Demonstration board
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: DEM-OPA-SO-4A
DEM-OPA-SO-4A
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: DEM-OPA-TSSOP-4A
DEM-OPA-TSSOP-4A
Lifecycle Status: Active (Recommended for new designs)
应用须知
- Current Feedback Amplifiers: Review, Stability Analysis, and ApplicationsPDF, 53 Kb, 档案已发布: Nov 20, 2000
The majority of op amp circuits are closed-loop feedback systems that implement classical control theory analysis. Analog designers are comfortable with Voltage FeedBack (VFB) op amps in a closed-loop system and are familiar with the ideal op amp approximations feedback permit. This application bulletin will demonstrate how CFB op amps can be analyzed in a similar fashion. Once the closed-loop sim - Stabilizing Current-Feedback Op Amps While Optimizing Circuit PerformancePDF, 280 Kb, 档案已发布: Apr 28, 2004
Optimizing a circuit design with a current-feedback (CFB) op amp is a relatively straightforward task, once one understands how CFB op amps achieve stability. This application note explains a 2nd-order CFB model so that any designer can better understand the flexibility of the CFB op amp. This report also discusses stability analysis, the effects of parasitic components due to PCBs, optimization - Active filters using current-feedback amplifiersPDF, 227 Kb, 档案已发布: Feb 25, 2005
- Expanding the usability of current-feedback amplifiersPDF, 215 Kb, 档案已发布: Feb 28, 2005
- RLC Filter Design for ADC Interface Applications (Rev. A)PDF, 299 Kb, 修订版: A, 档案已发布: May 13, 2015
As high performance Analog-to-Digital Converters (ADCs) continue to improve in their performance, the last stage interface from the final amplifier into the converter inputs becomes a critical element in the system design if the full converter dynamic range is desired. This application note describes the performance and design equations for a simple passive 2nd-order filter used successfully in AD - ADS5500, OPA695: PC Board Layout for Low Distortion High-Speed ADC DriversPDF, 273 Kb, 档案已发布: Apr 22, 2004
Once an analog-to-digital converter (ADC) and a driver/interface have been selected for a given application, the next step to achieving excellent performance is laying out the printed circuit board (PCB) that will support the application. This application report describes several techniques for optimizing a high-speed, 14-bit performance, differential driver PCB layout using a wideband operation - Measuring Board Parasitics in High-Speed Analog DesignPDF, 134 Kb, 档案已发布: Jul 7, 2003
Successful circuit designs using high-speed amplifiers can depend upon understanding and identifying parasitic PCB components. Simulating a design while including PCB parasitics can protect against unpleasant production surprises. This application report discusses an easy method for measuring parasitic components in a prototype or final PC board design by using a standard oscilloscope and low freq - Noise Analysis for High Speed Op Amps (Rev. A)PDF, 256 Kb, 修订版: A, 档案已发布: Jan 17, 2005
As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu
模型线
系列: OPA4684 (4)
- OPA4684ID OPA4684IDG4 OPA4684IDR OPA4684IPWT
制造商分类
- Semiconductors > Amplifiers > Operational Amplifiers (Op Amps) > High-Speed Op Amps (>=50MHz)