Datasheet Texas Instruments TMS320VC5507PGE — 数据表
| 制造商 | Texas Instruments |
| 系列 | TMS320VC5507 |
| 零件号 | TMS320VC5507PGE |
定点数字信号处理器144-LQFP -40至85
数据表
TMS320VC5507 Fixed-Point Digital Signal Processor datasheet
PDF, 2.0 Mb, 修订版: J, 档案已发布: Jan 22, 2008
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 144 | 144 |
| Package Type | PGE | PGE |
| Industry STD Term | LQFP | LQFP |
| JEDEC Code | S-PQFP-G | S-PQFP-G |
| Package QTY | 60 | 60 |
| Device Marking | TMS320 | VC5507PGE |
| Width (mm) | 20 | 20 |
| Length (mm) | 20 | 20 |
| Thickness (mm) | 1.4 | 1.4 |
| Pitch (mm) | .5 | .5 |
| Max Height (mm) | 1.6 | 1.6 |
| Mechanical Data | 下载 | 下载 |
参数化
| Applications | Audio,Automotive,Communications and Telecom,Consumer Electronics,Industrial |
| DRAM | SDRAM |
| DSP | 1 C55x |
| DSP MHz | 108,144,200 Max. |
| HPI | 1 16-bit HPI |
| I2C | 1 |
| McBSP | 3 |
| Operating Systems | DSP/BIOS,VLX |
| Operating Temperature Range | -40 to 85 C |
| Rating | Catalog |
| USB | 1 |
生态计划
| RoHS | Compliant |
设计套件和评估模块
- JTAG Emulators/ Analyzers: TMDSEMU560V2STM-UE
XDS560v2 System Trace USB & Ethernet Debug Probe
Lifecycle Status: Active (Recommended for new designs) - JTAG Emulators/ Analyzers: TMDSEMU200-U
XDS200 USB Debug Probe
Lifecycle Status: Active (Recommended for new designs) - JTAG Emulators/ Analyzers: TMDSEMU100V2U-14T
XDS100v2 JTAG Debug Probe (14-pin TI version)
Lifecycle Status: Active (Recommended for new designs) - JTAG Emulators/ Analyzers: TMDSEMU100V2U-20T
XDS100v2 JTAG Debug Probe (20-pin cTI version)
Lifecycle Status: Active (Recommended for new designs) - JTAG Emulators/ Analyzers: TMDSEMU560V2STM-U
XDS560v2 System Trace USB Debug Probe
Lifecycle Status: Active (Recommended for new designs)
应用须知
- TMS320VC5507 Hardware Designer's Resource GuidePDF, 155 Kb, 档案已发布: Jun 25, 2004
The DSP Hardware Designer's Resource Guide is organized by development flow and functional areas to make your design effort as seamless as possible. Topics covered include getting started, board design, system testing, and checklists to aid in your initial design and debug efforts. Each section includes pointers to valuable information including technical documentation, models, symbols, and refere - Disabling the Internal Oscillator on the TMSVC5503/C5506/C5507/C5509/C5509A DSP (Rev. D)PDF, 99 Kb, 修订版: D, 档案已发布: Sep 9, 2008
This application report contains information and examples on how to disable the internal clock oscillator on the TMS320VC5503, TMS320VC5506, TMS320VC5507, TMS320VC5509, and TMS320VC5509A DSPs to minimize power consumption. The document contains an overview of how the internal clock oscillator operates, and how to disable it as part of the IDLE power-down feature. It also discusses how to wake up t - Using the TMS320VC5506/C5507/C5509/C5509A USB Bootloader (Rev. C)PDF, 304 Kb, 修订版: C, 档案已发布: Oct 1, 2008
Bootloading the TMS320VC5506/C5507/C5509/C5509A digital signal processor (DSP) through the on-chip universal serial bus (USB) peripheral is part of the standard bootloader provided on the device. This document describes the procedures for physically connecting the DSP to a USB host, invoking the USB bootloader on the DSP, generating the correct boot table file, and downloading the boot table from - Using the USB APLL on the TMS320VC5506/C5507/C5509A (Rev. B)PDF, 102 Kb, 修订版: B, 档案已发布: Sep 9, 2008
This document describes how to switch to and program the unisersal serial bus (USB) analog phase-locked loop (APLL) on the C5506/C5507/C5509A devices. Example assembly programs for programming and switching to and from the APLL are also provided in the attached zip file. It is assumed that the reader is familiar with the use and operation of the C5506/C5507/C5509A USB digital phase-locked loop (DP - Recommended Power Solutions For TMS320C5509A/07/03PDF, 37 Kb, 档案已发布: Mar 28, 2005
- TMS320VC5503/VC5506/VC5507/C5509A Power Consumption Summary (Rev. C)PDF, 107 Kb, 修订版: C, 档案已发布: Sep 5, 2008
This document assists in the estimation of power consumption for the TMS320VC5503/C5506/C5507/C5509A digital signal processors (DSPs). Power consumption on these devices is highly application-dependent, so a spreadsheet is provided to model power consumption. The spreadsheet allows you to enter parameters that closely resemble the application and generate a realistic estimate of DSP power consumpt - Using the TMS320VC5503/C5506/C5507/C5509/C5509A Bootloader (Rev. F)PDF, 222 Kb, 修订版: F, 档案已发布: Sep 5, 2008
This document describes the features of the on-chip bootloder provided with the TMS320VC5503/C5506/C5507/C5509/C5509A digital signal processor (DSP). Included are descriptions of each of the available boot modes and any interfacing requirements associated with them as well as instructions on generating the boot table. - Board and System Design Considerations for the TMS320VC5503/06/07/09A DSPsPDF, 120 Kb, 档案已发布: Nov 19, 2008
An effective system-level board design requires termination of specific pins and taking advantage of idle and power-down modes on these low power VC5503/5506/5507/5509A digital signal processors (DSPs). This can be achieved by controlling unused pins and dynamically turning off all peripherals and internal functional units when not in use. The benefit is that the DSP and application consume only a - High-Speed Interface Layout Guidelines (Rev. G)PDF, 814 Kb, 修订版: G, 档案已发布: Jul 27, 2017
As modern bus interface frequencies scale higher, care must be taken in the printed circuit board (PCB) layout phase of a design to ensure a robust solution.
模型线
系列: TMS320VC5507 (5)
- TMS320VC5507GHH TMS320VC5507PGE TMS320VC5507ZHH TMS320VC5507ZHHR TNETV2507ANPGE
制造商分类
- Semiconductors > Processors > Digital Signal Processors > C5000 DSP > C55x DSP