Datasheet Texas Instruments TPS62200DBVTG4 — 数据表

制造商	Texas Instruments
系列	TPS62200
零件号	TPS62200DBVTG4

SOT-23 5-SOT-23中的可调，300mA，95％高效降压转换器-40至85

数据表

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PDF, 1.2 Mb, 修订版: F, 档案已发布: Jun 30, 2015

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价格

状态

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	Yes

打包

Pin	5
Package Type	DBV
Industry STD Term	SOT-23
JEDEC Code	R-PDSO-G
Package QTY	250
Carrier	SMALL T&R
Device Marking	PHKI
Width (mm)	1.6
Length (mm)	2.9
Thickness (mm)	1.2
Pitch (mm)	.95
Max Height (mm)	1.45
Mechanical Data	下载

参数化

Control Mode	Voltage Mode
Duty Cycle(Max)	100 %
Iout(Max)	0.3 A
Iq(Typ)	0.015 mA
Operating Temperature Range	-40 to 85 C
Package Group	SOT-23
Rating	Catalog
Regulated Outputs	1
Special Features	Enable,Light Load Efficiency,Synchronous Rectification
Switching Frequency(Max)	1500 kHz
Switching Frequency(Min)	650 kHz
Type	Converter
Vin(Max)	6 V
Vin(Min)	2.5 V
Vout(Max)	6 V
Vout(Min)	0.7 V

生态计划

RoHS

Compliant

设计套件和评估模块

Evaluation Modules & Boards: TPS62203EVM-211
TPS62203 6V Input, 3.3V Output, 0.3A Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
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Evaluation Modules & Boards: TPS62200EVM-211
TPS62200 6V Input, 1.8V Output, 0.3A Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
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应用须知

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DVS For OMAP1510 Using TPS62200
PDF, 61 Kb, 档案已发布: Dec 4, 2002
Portable electronics with long battery lives are unquestionably more marketable. Power consumption of the microprocessor can be reduced by lowering the internal clock frequency and/or even more by lowering the core supply voltage. Dynamic voltage scaling (DVS) is used to reduce core supply voltage to minimize power consumption. This application note explains how to implement DVS using a TPS6220
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Power Ref Design for TMS320C6472 5Vin DC/DC Converters (1x C6472)
PDF, 251 Kb, 档案已发布: Mar 31, 2010
This reference design is intended for designers who wish to design a TMS320C6472 Digital Signal Processor into a system using a nominal input voltage of 5 V, DC/DC converters with integrated FETs, and allowing for ease-of-design and a smaller solution size.
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Power Solution Using Discrete DC/DC Converters and LDOs (Rev. B)
PDF, 299 Kb, 修订版: B, 档案已发布: Aug 26, 2010
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Design considerations for a resistive feedback divider in a DC/DC converter
PDF, 393 Kb, 档案已发布: Apr 26, 2012
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Optimizing Transient Response of Internally Compensated DC-DC Converters (Rev. A)
PDF, 1.1 Mb, 修订版: A, 档案已发布: May 11, 2015
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Five steps to a great PCB layout for a step-down converter
PDF, 162 Kb, 档案已发布: Jan 29, 2015
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Understanding the Absolute Maximum Ratings of the SW Node (Rev. A)
PDF, 755 Kb, 修订版: A, 档案已发布: Jan 13, 2012
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Testing tips for applying external power to supply outputs without an input volt
PDF, 110 Kb, 档案已发布: Oct 24, 2016
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Basic Calculation of a Buck Converter's Power Stage (Rev. B)
PDF, 202 Kb, 修订版: B, 档案已发布: Aug 17, 2015
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Extending the Soft Start Time Without a Soft Start Pin (Rev. B)
PDF, 387 Kb, 修订版: B, 档案已发布: Jun 15, 2017
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IQ: What it is what it isn’t and how to use it
PDF, 198 Kb, 档案已发布: Jun 17, 2011
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Performing Accurate PFM Mode Efficiency Measurements (Rev. A)
PDF, 418 Kb, 修订版: A, 档案已发布: Dec 11, 2018
When performing measurements on DC-DC converters using pulse frequency modulation(PFM)or any power save mode proper care must be taken to ensure that the measurements are accurate. An accurate PFM mode efficiency measurement is critical for systems which require high efficiency at low loads such as in smart home systems tablets wearables and metering.

模型线

系列: TPS62200 (4)

TPS62200DBVR TPS62200DBVRG4 TPS62200DBVT TPS62200DBVTG4

制造商分类

Semiconductors > Power Management > Non-isolated DC/DC Switching Regulator > Step-Down (Buck) > Buck Converter (Integrated Switch)