[ /Title
(CD74
HC704
6A,
CD74
HCT70
46A)
/Subject
(PhaseLocked
Loop CD74HC7046A,
CD74HCT7046A
Data sheet acquired from Harris Semiconductor
SCHS218C Phase-Locked Loop
with VCO and Lock Detector February 1998 -Revised October 2003 Features Description Center Frequency of 18MHz (Typ) at VCC = 5V,
Minimum Center Frequency of 12MHz at VCC = 4.5V The CD74HC7046A and CD74HCT7046A high-speed
silicon-gate CMOS devices, specified in compliance with
JEDEC Standard No. 7A, are phase-locked-loop (PLL)
circuits that contain a linear voltage-controlled oscillator
(VCO), two-phase comparators (PC1, PC2), and a lock
detector. A signal input and a comparator input are common
to each comparator. The lock detector gives a HIGH level at
pin 1 (LD) when the PLL is locked. The lock detector
capacitor must be connected between pin 15 (CLD) and pin …
