Datasheet Texas Instruments ADS8371IBPFBT — 数据表

制造商Texas Instruments
系列ADS8371
零件号ADS8371IBPFBT
Datasheet Texas Instruments ADS8371IBPFBT

带并行48-TQFP的16位750kHz单极输入微功耗采样ADC转换器-40至85

数据表

16-Bit 750-kHz Unipolar Input Micro Power Sampling ADC Converter w/Parallel datasheet
PDF, 994 Kb, 修订版: B, 档案已发布: Feb 9, 2005
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin4848
Package TypePFBPFB
Industry STD TermTQFPTQFP
JEDEC CodeS-PQFP-GS-PQFP-G
Package QTY250250
CarrierSMALL T&RSMALL T&R
Device MarkingADS8371IB
Width (mm)77
Length (mm)77
Thickness (mm)11
Pitch (mm).5.5
Max Height (mm)1.21.2
Mechanical Data下载下载

参数化

# Input Channels1
Analog Voltage AVDD(Max)5.25 V
Analog Voltage AVDD(Min)4.75 V
ArchitectureSAR
Digital Supply(Max)5.25 V
Digital Supply(Min)2.7 V
INL(Max)1.5 +/-LSB
Input Range(Max)4.2 V
Input TypePseudo-Differential,Single-Ended
Integrated FeaturesOscillator
InterfaceParallel
Multi-Channel ConfigurationN/A
Operating Temperature Range-40 to 85 C
Package GroupTQFP
Package Size: mm2:W x L48TQFP: 81 mm2: 9 x 9(TQFP) PKG
Power Consumption(Typ)130 mW
RatingCatalog
Reference ModeExt
Resolution16 Bits
SINAD87.6 dB
SNR87.7 dB
Sample Rate (max)750kSPS SPS
Sample Rate(Max)0.75 MSPS
THD(Typ)-106 dB

生态计划

RoHSCompliant

应用须知

  • Interfacing the ADS8371 to TMS320C6713 DSP
    PDF, 316 Kb, 档案已发布: Jan 4, 2005
    This application report presents a solution to interfacing the ADS8371 16-bit, 750-KSPS, parallel interface converter to the TMS320C6713 digital signal processor of the TMS320? DSP family. The hardware solution is made up of existing hardware, specifically the ADS8371EVM, C6713 DSK, and 5-6K Interface Board. The software demonstrates how to use an EDMA ping-pong buffer and Timer1 peripherals to co
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

模型线

制造商分类

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)