Datasheet Texas Instruments ADS5424HFG/EM — 数据表

制造商	Texas Instruments
系列	ADS5424-SP
零件号	ADS5424HFG/EM

14位125MSPS模数转换器（ADC）-仅V级52-CFP 25

数据表

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PDF, 436 Kb, 修订版: D, 档案已发布: Sep 16, 2013

从文件中提取

价格

状态

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

打包

Pin	52	52
Package Type	HFG	HFG
Industry STD Term	CFP	CFP
JEDEC Code	S-PQFP-F	S-PQFP-F
Package QTY	1	1
Device Marking	ADS5424HFG/EM	EVAL ONLY
Width (mm)	13.97	13.97
Length (mm)	13.97	13.97
Thickness (mm)	3.42	3.42
Pitch (mm)	.64	.64
Max Height (mm)	3.42	3.42
Mechanical Data	下载	下载

参数化

# Input Channels	1
Analog Voltage AVDD(Max)	5.25 V
Analog Voltage AVDD(Min)	4.75 V
Architecture	Pipeline
Digital Supply(Max)	3.6 V
Digital Supply(Min)	3 V
ENOB	11.5 Bits
INL(Max)	6.9 +/-LSB
INL(Typ)	3 +/-LSB
Interface	Parallel CMOS
Operating Temperature Range	-55 to 125,25 Only C
Package Group	CFP
Package Size: mm2:W x L	See datasheet (CFP) PKG
Power Consumption(Typ)	1900 mW
Rating	Space
Reference Mode	Int
Resolution	14 Bits
SFDR	81.6 dB
SNR	72.4 dB
Sample Rate (max)	105MSPS SPS

生态计划

RoHS	See ti.com

设计套件和评估模块

Evaluation Modules & Boards: TSW2200EVM
TSW2200 Low-Cost Portable Power Supply Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
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应用须知

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Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
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A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
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Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
PDF, 327 Kb, 修订版: A, 档案已发布: Sep 10, 2010
This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
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CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
PDF, 424 Kb, 档案已发布: Jun 8, 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
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Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
PDF, 2.3 Mb, 档案已发布: Jun 2, 2008
This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
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Principles of Data Acquisition and Conversion (Rev. A)
PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015
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Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
PDF, 376 Kb, 档案已发布: Apr 28, 2009
This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.

模型线

系列: ADS5424-SP (2)

5962-0720601VXC ADS5424HFG/EM

制造商分类

Semiconductors > Space & High Reliability > Data Converter > Analog to Digital Converters