Datasheet Texas Instruments THS3092DG4 — 数据表
| 制造商 | Texas Instruments |
| 系列 | THS3092 |
| 零件号 | THS3092DG4 |
双路高电压，低失真，电流反馈运算放大器8-SOIC -40至85
数据表
High-Voltage, Low-Distortion, Current-Feedback Operational Amplifier datasheet
PDF, 2.4 Mb, 修订版: B, 档案已发布: Jan 26, 2006
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 8 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 75 |
| Carrier | TUBE |
| Device Marking | 3092 |
| Width (mm) | 3.91 |
| Length (mm) | 4.9 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | 下载 |
参数化
| 2nd Harmonic | 66 dBc |
| 3rd Harmonic | 76 dBc |
| @ MHz | 10 |
| Acl, min spec gain | 1 V/V |
| Additional Features | N/A |
| Architecture | Bipolar,Current FB |
| BW @ Acl | 145 MHz |
| CMRR(Min) | 68 dB |
| CMRR(Typ) | 78 dB |
| GBW(Typ) | 145 MHz |
| Input Bias Current(Max) | 15000000 pA |
| Iq per channel(Max) | 10.5 mA |
| Iq per channel(Typ) | 9.5 mA |
| Number of Channels | 2 |
| Offset Drift(Typ) | 10 uV/C |
| Operating Temperature Range | -40 to 85 C |
| Output Current(Typ) | 250 mA |
| Package Group | SOIC |
| Package Size: mm2:W x L | 8SOIC: 29 mm2: 6 x 4.9(SOIC) PKG |
| Rail-to-Rail | No |
| Rating | Catalog |
| Slew Rate(Typ) | 5700 V/us |
| Total Supply Voltage(Max) | 30 +5V=5, +/-5V=10 |
| Total Supply Voltage(Min) | 10 +5V=5, +/-5V=10 |
| Vn at 1kHz(Typ) | 2 nV/rtHz |
| Vn at Flatband(Typ) | 2 nV/rtHz |
| Vos (Offset Voltage @ 25C)(Max) | 3 mV |
生态计划
| RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: THS3092EVM
THS3092 Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
应用须知
- Design for a Wideband Differential Transimpedance DAC Output (Rev. A)PDF, 438 Kb, 修订版: A, 档案已发布: Oct 17, 2016
High-speed digital-to-analog converters commonly offer a complementary current output signal. Most output interface implementations use either a resistive load and/or a transformer to convert this current source signal to a voltage. Where a dc-coupled interface is required, a carefully designed differential transimpedance stage can offer an attractive alternative. Design considerations and options - Voltage Feedback vs. Current Feedback Op AmpsPDF, 93 Kb, 档案已发布: Nov 30, 1998
This application report contrasts and compares the characteristics and capabilities of voltage and current feedback operational amplifiers. The report also points out the many similarities between the two versions. - Stabilizing Current-Feedback Op Amps While Optimizing Circuit PerformancePDF, 280 Kb, 档案已发布: Apr 28, 2004
Optimizing a circuit design with a current-feedback (CFB) op amp is a relatively straightforward task, once one understands how CFB op amps achieve stability. This application note explains a 2nd-order CFB model so that any designer can better understand the flexibility of the CFB op amp. This report also discusses stability analysis, the effects of parasitic components due to PCBs, optimization - Designing for low distortion with high-speed op ampsPDF, 277 Kb, 档案已发布: Mar 2, 2005
- Noise Analysis for High Speed Op Amps (Rev. A)PDF, 256 Kb, 修订版: A, 档案已发布: Jan 17, 2005
As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu
模型线
系列: THS3092 (5)
- THS3092D THS3092DDA THS3092DDAG3 THS3092DDAR THS3092DG4
制造商分类
- Semiconductors > Amplifiers > Operational Amplifiers (Op Amps) > High-Speed Op Amps (>=50MHz)