Datasheet Texas Instruments ADS807EG4 — 数据表
| 制造商 | Texas Instruments |
| 系列 | ADS807 |
| 零件号 | ADS807EG4 |
12位，53 MSPS ADC SE /差分输入，范围为2至3Vpp，内部/外部基准，超出范围指示器28-SSOP -40至85
数据表
ADS807: 12-Bit, 53MHz Sampling Analog-To-Digital Converter (Rev. A)
PDF, 853 Kb, 修订版: A, 档案已发布: Jun 11, 2002
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 28 |
| Package Type | DB |
| Industry STD Term | SSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 50 |
| Carrier | TUBE |
| Device Marking | ADS807E |
| Width (mm) | 5.3 |
| Length (mm) | 10.2 |
| Thickness (mm) | 1.95 |
| Pitch (mm) | .65 |
| Max Height (mm) | 2 |
| Mechanical Data | 下载 |
参数化
| # Input Channels | 1 |
| Analog Input BW(MHz) | 270 |
| Approx. Price (US$) | 13.66 | 1ku |
| Architecture | Pipeline |
| DNL(Max)(+/-LSB) | 1 |
| ENOB(Bits) | 0.5 |
| INL(Max)(+/-LSB) | 2 |
| Input Range | 2V / 3V (p-p) |
| Interface | Parallel CMOS |
| Operating Temperature Range(C) | -40 to 85 |
| Package Group | SSOP |
| Package Size(mm2=WxL) | 28SSOP: 80 mm2: 7.8 x 10.2 |
| Power Consumption(Typ)(mW) | 335 |
| Rating | Catalog |
| Reference Mode | Int Ext |
| Resolution(Bits) | 12 |
| SFDR(dB) | 82 |
| SINAD(dB) | 69 |
| SNR(dB) | 69 |
| Sample Rate (max)(SPS) | 53MSPS |
生态计划
| RoHS | Compliant |
| Pb Free | Yes |
设计套件和评估模块
- Evaluation Modules & Boards: TSW2200EVM
TSW2200EVM: Low Cost Portable Power Supply
Lifecycle Status: Active (Recommended for new designs)
应用须知
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This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the refe - CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital ConvertersPDF, 424 Kb, 档案已发布: Jun 8, 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed, high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483, which is capable of - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015
AB-082 Principles of Data Acquisition and Conversion - Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
AB-084 Analog-to-Digital Grounding Practices Affect System Performance - Interleaving Analog-to-Digital ConvertersPDF, 64 Kb, 档案已发布: Oct 2, 2000
It is tempting when pushing the limits of analog-to-digital conversion to consider interleaving two or more converters to increase the sample rate. However, such designs must take into consideration s - A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (ΔΣ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specificati - What Designers Should Know About Data Converter DriftPDF, 95 Kb, 档案已发布: Oct 2, 2000
Exactly how inaccurate will a change in temperature make an analog-to-digital or digital-to-analog converter? As designers are well aware, a 12-bit device may provide a much lower accuracy at its oper
模型线
系列: ADS807 (3)
- ADS807E ADS807E/1K ADS807EG4
制造商分类
- Semiconductors > Data Converters > Analog to Digital Converter > High Speed ADC (>10MSPS)