C6000 DSP + ARM处理器361-NFBGA -40至105
PDF, 1.6 Mb, 修订版: E, 档案已发布: Jan 23, 2014
This application report describes various boot mechanisms supported by the OMAP-L132/138 bootloader read-only memory (ROM) image. Topics covered include the Application Image Script (AIS) boot process, an AISgen tool used to generate boot scripts, protocol for booting the device from an external master device, a UART Boot Host GUI for booting the device from a host PC, and any limitations, default
PDF, 37 Kb, 档案已发布: Aug 30, 2010
This article discusses the power consumption of the Texas Instruments OMAP-L138. Power consumption on the OMAP-L138 devices are highly application-dependent. The low-core voltage and other power design optimizations allow these devices to operate with industry-leading performance, while maintaining a low power-to-performance ratio.The power data presented in this document are based on measu
PDF, 695 Kb, 档案已发布: Apr 13, 2012
TPS650061, OMAP-L132, OMAP-L137, OMAP-L138 Power Sequencing for OMAP-L132, L137, and L138 using the TPS650061
PDF, 28 Kb, 档案已发布: Jun 27, 2012
This article will guide you in the basic setup of the file system and Linux kernel for the Smart Grid Infrastructure (SGI) EVM. It also provides information on modifying and rebuilding the Linux kernel for your application.The SGI platform is designed for development and test of smart grid applications including: data concentrator, power protection and monitoring, power analytics, industria
PDF, 28 Kb, 档案已发布: Jun 27, 2012
The Metrology Demo showcases the ability of the dual-core OMAP-L138 DSP+ARM processor to execute metrology functions, power analytics algorithms (FFT), and a Rogowski coil digital integrator on its TMS320C674x DSP, while at the same time running a high-level operating system (Linux) with network communication on its ARM9в„ў core. A Windows PC graphical user interface (GUI) is used to display t
PDF, 29 Kb, 档案已发布: Jun 8, 2011
The generic secure environment is supported by hardware within the C674x DSP core. This allows critical code to be executed in a secure environment, hiding sensitive information from the outside world with the help of the following hardware features:Secure thread support – hardware support that allows trusted code to be executed from secure ROMor secure RAM.Protected transition
PDF, 735 Kb, 修订版: A, 档案已发布: Apr 26, 2011
PDF, 26 Kb, 档案已发布: Jul 20, 2009
This article has been contributed to the TI DaVinciв„ў and OMAPв„ў Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:http://tiexpressdsp.com/index.php/OMAP-L1x8_Complementary_Products .This Wiki article serves as a repository of complimentary devices that ca
PDF, 453 Kb, 修订版: B, 档案已发布: Aug 29, 2011
This documents details the design consideration of a power management unit (PMU) solution for the OMAP-L132/-L138 low-power applications processors with a TPS65070 five-channel power management device.
PDF, 37 Kb, 修订版: B, 档案已发布: Sep 27, 2013
The OMAP-L1x8 and C6742/6/8 devices use a great deal of internal pin multiplexing to allow the most functionality in the smallest and lowest cost package. This software allows the pin multiplexing registers of the device to be calculated with ease, as well as showing what peripherals can be used together and what devices support the peripherals that are selected. This software is useful to anyone
PDF, 97 Kb, 档案已发布: Nov 25, 2009
This application note contains instructions for implementing Canny Edge Detection algorithm using VLIB. The general ideas given here can also be applied for an application which calls a sequence of VLIB functions in a block-based manner.
PDF, 266 Kb, 修订版: C, 档案已发布: Aug 29, 2011
This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, or OMAP-L132/L138 processor. Using sequenced power supplies, this reference design describes a system having a 12-V input voltage and a high-efficiency dc/dc converter with integrated FETs and dynamic voltage and frequency scaling (DVFS) for a small, simple design.Sequenced power supply architec
PDF, 150 Kb, 修订版: B, 档案已发布: Aug 29, 2011
This reference design helps those desiring to design-in the TMS320C6742, TMS320C6746, TMS320C6748, and OMAP-L132/L138. This design, employing sequenced power supplies, describes asystem with an input voltage of 3.3 V, and uses LDOs for a small, simple system.Sequenced power supply architectures are becoming commonplace in high-performance microprocessor and digital signal processor (DSP) syste
PDF, 387 Kb, 修订版: B, 档案已发布: Aug 29, 2011
This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, or OMAP-L132/L138 processor. Using sequenced power supplies, this reference design describes a system having a 3.3-V input voltage and a high-efficiency dc/dc converter with integrated FETs for a small, simple design.Sequenced power supply architectures are becoming commonplace in high-performan
PDF, 208 Kb, 修订版: A, 档案已发布: May 5, 2010
This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, OMAP-L138 or AM18x processor. Using sequenced power supplies, this reference design describes a system having a 12-V input voltage and a high-efficiency dc/dc converter with ntegrated FETs and dynamic voltage and frequency scaling (DVFS) for a small, simple design.Sequenced power supply archit
PDF, 161 Kb, 修订版: A, 档案已发布: May 5, 2010
This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, OMAP-L138 or AM18x processor. Using sequenced power supplies, this reference design describes a system having a 12-V input voltage and a high-efficiency dc/dc converter with ntegrated FETs and dynamic voltage and frequency scaling (DVFS) for a small, simple design.Sequenced power supply archit
PDF, 3.6 Mb, 档案已发布: Aug 17, 2009
This application report describes the TMS320C6748/46/42 and OMAP-L1x8 embedded Host electrical compliance of a high-speed (HS) universal serial bus (USB) operation conforming to the USB 2.0 specification. The OTG controller supports the USB 2.0 device and host mode at high-speed (HS), full-speed (FS) and low-speed (LS).
PDF, 1.1 Mb, 档案已发布: Aug 17, 2009
This application report describes the TMS320C6748/46/42 and OMAP-L1x8 electrical compliance of a high-speed (HS) universal serial bus (USB) operation conforming to the USB 2.0 specification. The on-the-go (OTG) controller supports the USB 2.0 device and host mode at high-speed (HS), full-speed (FS) and low-speed (LS).
PDF, 89 Kb, 档案已发布: Mar 12, 2009
This application report contains the USB checklist for the TMS320C674x/OMAP-L1x (C674x/OMAP-L1x). The C674x/OMAP-L1x has a compliant full-speed USB device port and does not support a low-speed USB device operation.
PDF, 19 Kb, 档案已发布: Feb 12, 2010
This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:http://wiki.davincidsp.com/index.php/OMAP-L1x/C674x/AM1x_SOC_Architecture_and_Throughput_Overview. This collection of Wiki articles provide i
PDF, 62 Kb, 档案已发布: Jan 13, 2016
This application report provides benchmarks for the C674x DSP core, the C66x DSP core and the ARMВ®CortexВ®-A15 core. This document also shows how to reproduce these benchmarks on specific hardware platforms.
PDF, 93 Kb, 修订版: A, 档案已发布: Jul 17, 2008
This application report motivates the way the DDR high-speed timing requirements are now going to be communicated to system designers. The traditional method of using data sheet parameters and simulation models is tedious. The system designer uses this information to evaluate whether timing specifications are met and can be expected to operate reliably.Ultimately, the real question the hardwa
PDF, 814 Kb, 修订版: G, 档案已发布: Jul 27, 2017
As modern bus interface frequencies scale higher, care must be taken in the printed circuit board (PCB) layout phase of a design to ensure a robust solution.
PDF, 535 Kb, 档案已发布: Oct 6, 2011
The TMS320C6000™ Digital Signal Processors (DSPs) have many architectural advantages that make them ideal for computation-intensive real-time applications. However to fully leverage the architectural features that C6000™ processors offer code optimization may be required. First this document reviews five key concepts in understanding the C6000 DSP architecture and optimization. Then
