Datasheet Texas Instruments 5962-0924001VXC — 数据表

制造商	Texas Instruments
系列	ADS5400-SP
零件号	5962-0924001VXC

12位1.0GSPS模数转换器（ADC）100-CFP -55至125

数据表

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PDF, 1.1 Mb, 修订版: D, 档案已发布: Jan 2, 2014

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价格

状态

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

打包

Pin	100
Package Type	HFS
Industry STD Term	CFP (TBAR)
JEDEC Code	S-CQFP-F
Package QTY	1
Width (mm)	19.05
Length (mm)	19.05
Thickness (mm)	2.82
Pitch (mm)	0.5
Max Height (mm)	3.15
Mechanical Data	下载

参数化

# Input Channels	1
Analog Voltage AVDD(Max)	3.465 V
Analog Voltage AVDD(Min)	3.135 V
Architecture	Pipeline
Digital Supply(Max)	3.465 V
Digital Supply(Min)	3.135 V
ENOB	9.2 Bits
INL(Max)	4.5 +/-LSB
INL(Typ)	1.5 +/-LSB
Interface	Parallel LVDS
Operating Temperature Range	-55 to 125,25 Only C
Package Group	CFP
Package Size: mm2:W x L	See datasheet (CFP) PKG
Power Consumption(Typ)	2200 mW
Rating	Space
Reference Mode	Ext,Int
Resolution	12 Bits
SFDR	72 dB
SNR	58.5 dB

生态计划

RoHS	See ti.com

设计套件和评估模块

Evaluation Modules & Boards: ADS5400EVM-CVAL
ADS5400-SP Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
- 下载
Evaluation Modules & Boards: ADS5400EVM
ADS5400 12-bit; 1.0-GSPS Analog-to-Digital Converter Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
- 下载

应用须知

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Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
PDF, 2.3 Mb, 档案已发布: Jun 2, 2008
This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
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CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
PDF, 424 Kb, 档案已发布: Jun 8, 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
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CDCE62005 as Clock Solution for High-Speed ADCs
PDF, 805 Kb, 档案已发布: Sep 4, 2008
TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
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Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
PDF, 327 Kb, 修订版: A, 档案已发布: Sep 10, 2010
This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
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Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
PDF, 376 Kb, 档案已发布: Apr 28, 2009
This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.

模型线

系列: ADS5400-SP (3)

5962-0924001VXC ADS5400HFS/EM ADS5400MHFSV

制造商分类

Semiconductors > Space & High Reliability > Data Converter > Analog to Digital Converters

其他名称:

59620924001VXC, 5962 0924001VXC