Datasheet Texas Instruments CD4020BEE4 — 数据表

CMOS 14级纹波传送二进制计数器/除法器16-PDIP -55至125

数据表

PDF, 1.6 Mb, 修订版: D, 档案已发布: Dec 11, 2003, 页数: 25
CMOS Ripple-Carry Binary Counter/Dividers

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Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

Approx. price	0.11 \| 1ku US$
Bits	12
F @ nom voltage(Max)	8 MHz
Function	Counter
ICC @ nom voltage(Max)	0.03 mA
IOH(Max)	-1.5 mA
IOL(Max)	1.5 mA
Operating temperature range	-55 to 125 C
Package Group	PDIP\|16,SO\|16,TSSOP\|16
Package size: mm2:W x L	See datasheet (PDIP),16SO: 80 mm2: 7.8 x 10.2 (SO\|16),16TSSOP: 22 mm2: 4.4 x 5 (TSSOP\|16) PKG
Rating	Catalog
Technology Family	CD4000
Type	Binary
VCC(Max)	18 V
VCC(Min)	3 V
Voltage(Nom)	5,10,15 V
tpd @ nom Voltage(Max)	160 ns

RoHS

Compliant

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Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics
PDF, 188 Kb, 档案已发布: Dec 3, 2001
Both buffered and unbuffered CMOS B-series gates inverters and high-current IC products are available from TI. Each product classification has application advantages in appropriate logic-system designs. Many CMOS suppliers have concentrated on promoting buffered B-series products with applications literature focusing on the attributes and use of the buffered types. This practice has left an imb
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Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
PDF, 337 Kb, 档案已发布: Jul 8, 2004
Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
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Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
PDF, 614 Kb, 修订版: C, 档案已发布: Dec 2, 2015

系列: CD4020B (8)