Datasheet Texas Instruments ADS7881IPFBT — 数据表

制造商Texas Instruments
系列ADS7881
零件号ADS7881IPFBT
Datasheet Texas Instruments ADS7881IPFBT

具有Ref 48-TQFP的2.7V-5.25V数字,5V模拟,12位,4MSPS,并行ADC -40至85

数据表

12 Bit 4 MSPS Low Power SAR Analog to Digital Converter datasheet
PDF, 1.0 Mb, 修订版: B, 档案已发布: Nov 11, 2005
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin48
Package TypePFB
Industry STD TermTQFP
JEDEC CodeS-PQFP-G
Package QTY250
CarrierSMALL T&R
Device MarkingADS7881I
Width (mm)7
Length (mm)7
Thickness (mm)1
Pitch (mm).5
Max Height (mm)1.2
Mechanical Data下载

参数化

# Input Channels1
Analog Voltage AVDD(Max)5.25 V
Analog Voltage AVDD(Min)4.75 V
ArchitectureSAR
Digital Supply(Max)5.25 V
Digital Supply(Min)2.7 V
INL(Max)1 +/-LSB
Input Range(Max)2.6 V
Input TypePseudo-Differential,Single-Ended
Integrated FeaturesOscillator
InterfaceParallel
Multi-Channel ConfigurationN/A
Operating Temperature Range-40 to 85 C
Package GroupTQFP
Package Size: mm2:W x L48TQFP: 81 mm2: 9 x 9(TQFP) PKG
Power Consumption(Typ)95 mW
RatingCatalog
Reference ModeExt,Int
Resolution12 Bits
SINAD71.5 dB
SNR71.5 dB
Sample Rate (max)4MSPS SPS
Sample Rate(Max)4 MSPS
THD(Typ)-91 dB

生态计划

RoHSCompliant

设计套件和评估模块

  • Evaluation Modules & Boards: ADS7881EVM
    ADS7881EVM Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

应用须知

  • Interfacing the ADS7881 to TMS320C6713 DSP
    PDF, 1.1 Mb, 档案已发布: Jun 30, 2005
    This application report presents a solution to interfacing the ADS7881 12-bit parallel interface converter to the TMS320C6713 DSP. The hardware solution is made up of existing hardware, specifically, the ADS7881EVM, 'C6713 DSK, and the 5-6K Interface Board. The software demonstrates how to use an EDMA ping-pong buffer and Timer1 peripherals to collect data at 4 MSPS. Discussed also are some of the
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015

模型线

制造商分类

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)