Datasheet Texas Instruments TLV1548CDBLE — 数据表
| 制造商 | Texas Instruments |
| 系列 | TLV1548 |
| 零件号 | TLV1548CDBLE |
10位85 kSPS ADC系列输出，可编程Pwr / Pwrdn /转换速率，TMS320 DSP / SPI / QPSI兼容，8通道20-SSOP
数据表
Low-Voltage 10-Bit A-D Converters w/Serial Control and 4/8 Analog Inputs datasheet
PDF, 1.1 Mb, 修订版: C, 档案已发布: Jan 21, 1999
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价格
状态
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No |
打包
| Pin | 20 |
| Package Type | DB |
| Industry STD Term | SSOP |
| JEDEC Code | R-PDSO-G |
| Width (mm) | 5.3 |
| Length (mm) | 7.2 |
| Thickness (mm) | 1.95 |
| Pitch (mm) | .65 |
| Max Height (mm) | 2 |
| Mechanical Data | 下载 |
参数化
| # Input Channels | 8 |
| Analog Voltage AVDD(Max)(V) | 5.5 |
| Analog Voltage AVDD(Min)(V) | 2.7 |
| Approx. Price (US$) | 2.42 | 1ku |
| Architecture | SAR |
| Digital Supply(Max)(V) | 5.5 |
| Digital Supply(Min)(V) | 2.7 |
| INL(Max)(+/-LSB) | 1 |
| Input Range(Max)(V) | 5.5 |
| Input Type | Single-Ended |
| Integrated Features | N/A |
| Interface | Serial SPI |
| Multi-Channel Configuration | Multiplexed |
| Operating Temperature Range(C) | -40 to 85 |
| Package Group | SSOP |
| Package Size: mm2:W x L (PKG) | 20SSOP: 56 mm2: 7.8 x 7.2(SSOP) |
| Power Consumption(Typ)(mW) | 1.05 |
| Rating | Catalog |
| Reference Mode | Ext |
| Resolution(Bits) | 10 |
| Sample Rate (max)(SPS) | 85kSPS |
生态计划
| RoHS | Not Compliant |
| Pb Free | No |
应用须知
- Interfacing the TLV1544/1548 Analog Digital Converter to Digital ProcessorsPDF, 266 Kb, 档案已发布: Aug 1, 1997
This Application Report describes the hardware and software requirements for interfacing an A/D converter to a DSP and to a MCU. The 10-bit A/D converter TLV1544 (4 analog input channels) and the TLV1548 (8 analog input channels) from Texas Instruments have been used to develop such interface. Example software code has been written showing how to program the DSP and the MCU to control the A/D conv - Choosing an ADC and Op Amp for Minimum OffsetPDF, 72 Kb, 档案已发布: Oct 28, 1999
Designing a mixed-signal circuit containing analog and digital components can be a challenge to the development engineer. Requirements such as a low single-polarity supply voltage and a high degree of precision may conflict, and make the choice of components and the best circuit design difficult. This report discusses problems that arise in using operational amplifiers (op amps) for signal conditi - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
模型线
系列: TLV1548 (7)
- TLV1548CDB TLV1548CDBG4 TLV1548CDBLE TLV1548CDBR TLV1548IDB TLV1548IDBG4 TLV1548IDBR
制造商分类
- Semiconductors > Data Converters > Analog to Digital Converter > Precision ADC (<=10MSPS)