Datasheet Texas Instruments ADS8509IDBG4 — 数据表
| 制造商 | Texas Instruments |
| 系列 | ADS8509 |
| 零件号 | ADS8509IDBG4 |
带串行接口的16位250kHz CMOS模数转换器2.5V内部基准电压源28-SSOP -40至85
数据表
16-Bit 250-KSPS Serial CMOS Sampling Analog-to-Digital Converter datasheet
PDF, 1.4 Mb, 修订版: C, 档案已发布: Apr 14, 2010
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
打包
| Pin | 28 |
| Package Type | DB |
| Industry STD Term | SSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 50 |
| Carrier | TUBE |
| Device Marking | ADS8509I |
| Width (mm) | 5.3 |
| Length (mm) | 10.2 |
| Thickness (mm) | 1.95 |
| Pitch (mm) | .65 |
| Max Height (mm) | 2 |
| Mechanical Data | 下载 |
参数化
| # Input Channels | 1 |
| Analog Voltage AVDD(Max) | 5.25 V |
| Analog Voltage AVDD(Min) | 4.75 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.25 V |
| Digital Supply(Min) | 4.75 V |
| INL(Max) | 2 +/-LSB |
| Input Range(Max) | 10 V |
| Input Range(Min) | -10 V |
| Input Type | Single-Ended |
| Integrated Features | Daisy-Chainable,Oscillator |
| Interface | SPI |
| Multi-Channel Configuration | N/A |
| Operating Temperature Range | -40 to 85 C |
| Package Group | SSOP |
| Package Size: mm2:W x L | 28SSOP: 80 mm2: 7.8 x 10.2(SSOP) PKG |
| Power Consumption(Typ) | 155 mW |
| Rating | Catalog |
| Reference Mode | Ext,Int |
| Resolution | 16 Bits |
| SINAD | 88 dB |
| SNR | 88 dB |
| Sample Rate (max) | 250kSPS SPS |
| Sample Rate(Max) | 0.25 MSPS |
| THD(Typ) | -98 dB |
生态计划
| RoHS | Compliant |
应用须知
- Upgrading From ADS7808/09 to ADS8508/09 DevicesPDF, 66 Kb, 档案已发布: Jun 12, 2007
The information contained in this document applies to current applications using the ADS7808 or ADS7809 in a surface-mount SOIC (DW) package.This document is a guide to users of the ADS7808/09 devices with regards to potential compatibility issues when upgrading to the new ADS8508 and ADS8509 series of devices. - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
模型线
系列: ADS8509 (13)
制造商分类
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)