Datasheet Texas Instruments F28M35M52C1RFPT — 数据表
制造商 | Texas Instruments |
系列 | F28M35M52C |
零件号 | F28M35M52C1RFPT |
协奏曲微控制器144-HTQFP -40至105
数据表
价格
状态
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
打包
Pin | 144 |
Package Type | RFP |
Industry STD Term | HTQFP |
JEDEC Code | S-PQFP-G |
Package QTY | 60 |
Carrier | JEDEC TRAY (5+1) |
Device Marking | F28M35M52C1RFPT |
Width (mm) | 20 |
Length (mm) | 20 |
Thickness (mm) | 1 |
Pitch (mm) | .5 |
Max Height (mm) | 1.2 |
Mechanical Data | 下载 |
参数化
# of ADC Modules | 2 |
12-bit A/D | 20 #Channels |
ADC Channels | 20 |
ADC Conversion Time | 172 ns |
ADC Resolution | 12-bit |
ADC Sample & Hold | Dual |
CAN | 2 |
CPU | C28x, Cortex-M3 |
DMA | 1 6-Ch DMA, 1 32-ch DMA Ch |
EMIF | Yes |
Ethernet | 1 |
FPU | Yes |
Flash | 1024 KB |
Frequency | 75 MHz |
GPIO | 64 |
Generation | 28x + ARM Cortex M3 Concerto Series |
I2C | 3 |
IO Supply | 3.3 V |
McBSP | 1 |
Operating Temperature Range | -40 to 105,-40 to 125 C |
PWM | 24 Ch |
Package Group | HTQFP |
Package Size: mm2:W x L | 144HTQFP: 484 mm2: 22 x 22(HTQFP) PKG |
RAM | 136 KB |
RISC Frequency | 75 MHz |
Rating | Catalog |
SPI | 5 |
Timers | 3 32-Bit CPU,1 WD |
Total On-Chip Memory | 1160 KB |
Total Serial Ports | 2 CANs,3 I2C,5 SPI,6 SCIs,1 McBSP,1 USB,1 Ethernet |
UART | 6 |
USB | 1 |
生态计划
RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: TMDSSOLARCEXPKIT
Concerto-based Solar Explorer Development Kit
Lifecycle Status: Active (Recommended for new designs) - Daughter Cards: TMDSCNCDH52C1
H52C1 Concerto controlCARD
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: TMDSDOCKH52C1
H52C1 Concerto Experimenter Kit
Lifecycle Status: Active (Recommended for new designs) - JTAG Emulators/ Analyzers: TMDSEMU100V2U-20T
XDS100v2 JTAG Debug Probe (20-pin cTI version)
Lifecycle Status: Active (Recommended for new designs) - JTAG Emulators/ Analyzers: TMDSEMU100V2U-14T
XDS100v2 JTAG Debug Probe (14-pin TI version)
Lifecycle Status: Active (Recommended for new designs) - JTAG Emulators/ Analyzers: TMDSEMU200-U
XDS200 USB Debug Probe
Lifecycle Status: Active (Recommended for new designs) - JTAG Emulators/ Analyzers: TMDSEMU560V2STM-UE
XDS560v2 System Trace USB & Ethernet Debug Probe
Lifecycle Status: Active (Recommended for new designs) - JTAG Emulators/ Analyzers: TMDSEMU560V2STM-U
XDS560v2 System Trace USB Debug Probe
Lifecycle Status: Active (Recommended for new designs)
应用须知
- Calculator for CAN Bit Timing ParametersPDF, 37 Kb, 档案已发布: Mar 22, 2016
Controller Area Network (CAN) nodes use user-specified timing parameters to sample the asynchronous bitstream and recover the clock. These parameters are typically based on the frequency of the available reference oscillator. There may be several options available for a given frequency, and some of them will allow a looser oscillator tolerance than others. This application report details the creat
模型线
系列: F28M35M52C (2)
- F28M35M52C1RFPS F28M35M52C1RFPT
制造商分类
- Semiconductors > Microcontrollers (MCU) > Performance MCUs > Control + Automation > F28M3x