Datasheet Texas Instruments 74AC11074PWLE — 数据表

制造商	Texas Instruments
系列	74AC11074
零件号	74AC11074PWLE

具有清零和预置14-TSSOP的双通道上升沿D型触发器-40至85

数据表

下载

PDF, 667 Kb, 修订版: A, 档案已发布: Apr 1, 1996

从文件中提取

价格

状态

Lifecycle Status	Obsolete (Manufacturer has discontinued the production of the device)
Manufacture's Sample Availability	No

打包

Pin	14
Package Type	PW
Industry STD Term	TSSOP
JEDEC Code	R-PDSO-G
Width (mm)	4.4
Length (mm)	5
Thickness (mm)	1
Pitch (mm)	.65
Max Height (mm)	1.2
Mechanical Data	下载

参数化

3-State Output	No
Approx. Price (US$)	0.71 \| 1ku
Bits(#)	2
F @ Nom Voltage(Max)(Mhz)	100
ICC @ Nom Voltage(Max)(mA)	0.04
Input Type	CMOS
Operating Temperature Range(C)	-40 to 85
Output Drive (IOL/IOH)(Max)(mA)	24/-24
Output Type	CMOS
Package Group	TSSOP
Package Size: mm2:W x L (PKG)	See datasheet (PDIP)
Rating	Catalog
Schmitt Trigger	No
Technology Family	AC
VCC(Max)(V)	5.5
VCC(Min)(V)	3
Voltage(Nom)(V)	3.3 5
tpd @ Nom Voltage(Max)(ns)	11.4 8.2

生态计划

RoHS	Not Compliant
Pb Free	No

应用须知

下载
Live Insertion
PDF, 150 Kb, 档案已发布: Oct 1, 1996
Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha
下载
Introduction to Logic
PDF, 93 Kb, 档案已发布: Apr 30, 2015
下载
Shelf-Life Evaluation of Lead-Free Component Finishes
PDF, 1.3 Mb, 档案已发布: May 24, 2004
The integrated circuit (IC) industry is converting to lead (Pb)-free termination finishes for leadframe-based packages. IC component users need to know the maximum length of time that components can be stored prior to being soldered. This study predicts shelf life of the primary Pb-free finishes being proposed by the industry. Components were exposed to a controlled environment, with known aging a
下载
Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
PDF, 337 Kb, 档案已发布: Jul 8, 2004
Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
下载
Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
PDF, 614 Kb, 修订版: C, 档案已发布: Dec 2, 2015
下载
Input and Output Characteristics of Digital Integrated Circuits
PDF, 1.7 Mb, 档案已发布: Oct 1, 1996
This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou
下载
CMOS Power Consumption and CPD Calculation (Rev. B)
PDF, 89 Kb, 修订版: B, 档案已发布: Jun 1, 1997
Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
下载
TI IBIS File Creation Validation and Distribution Processes
PDF, 380 Kb, 档案已发布: Aug 29, 2002
The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
下载
Implications of Slow or Floating CMOS Inputs (Rev. D)
PDF, 260 Kb, 修订版: D, 档案已发布: Jun 23, 2016
下载
Designing With Logic (Rev. C)
PDF, 186 Kb, 修订版: C, 档案已发布: Jun 1, 1997
Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
下载
Power-Up Behavior of Clocked Devices (Rev. A)
PDF, 34 Kb, 修订版: A, 档案已发布: Feb 6, 2015
下载
Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
PDF, 43 Kb, 档案已发布: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

模型线

系列: 74AC11074 (7)

74AC11074D 74AC11074DE4 74AC11074DR 74AC11074DRG4 74AC11074N 74AC11074PWLE 74AC11074PWR

制造商分类

Semiconductors > Logic > Flip-Flop/Latch/Register > D-Type Flip-Flop