Data sheet acquired from Harris Semiconductor
SCHS249B CD54AC273, CD74AC273
CD54ACT273, CD74ACT273
Octal D Flip-Flop with Reset August 1998 -Revised July 2002 Features Description Buffered Inputs The ’AC273 and ’ACT273 devices are octal D-type flip-flops
with reset that utilize advanced CMOS logic technology.
Information at the D input is transferred to the Q output on
the positive-going edge of the clock pulse. All eight flip-flops
are controlled by a common clock (CP) and a common reset
(MR). Resetting is accomplished by a low voltage level
independent of the clock. Typical Propagation Delay
-6.5ns at VCC = 5V, TA = 25oC, CL = 50pF Exceeds 2kV ESD Protection MIL-STD-883, Method
3015 SCR-Latchup-Resistant CMOS Process and Circuit
Design Ordering Information Speed of Bipolar FASTв„ў/AS/S with Significantly
Reduced Power Consumption PART
NUMBER Balanced Propagation Delays AC Types Feature 1.5V to 5.5V Operation and
Balanced Noise Immunity at 30% of the Supply В±24mA Output Drive Current
-Fanout to 15 FASTв„ў ICs
-Drives 50Ω Transmission Lines Pinout
CD54AC273, CD54ACT273
(CDIP)
CD74AC273, CD74ACT273
(PDIP, SOIC)
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