Datasheet Texas Instruments TLC2543MDBREP — 数据表
| 制造商 | Texas Instruments |
| 系列 | TLC2543-EP |
| 零件号 | TLC2543MDBREP |
增强型产品12位模数转换器，带串行控制和11个模拟输入20-SSOP -55至125
数据表
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 20 |
| Package Type | DB |
| Industry STD Term | SSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | TLC2543EP |
| Width (mm) | 5.3 |
| Length (mm) | 7.2 |
| Thickness (mm) | 1.95 |
| Pitch (mm) | .65 |
| Max Height (mm) | 2 |
| Mechanical Data | 下载 |
参数化
| # Input Channels | 11 |
| Analog Voltage AVDD(Max) | 5.5 V |
| Analog Voltage AVDD(Min) | 4.5 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.5 V |
| Digital Supply(Min) | 4.5 V |
| INL(Max) | 1 +/-LSB |
| Interface | SPI |
| Operating Temperature Range | -40 to 125,-55 to 125 C |
| Package Group | SSOP |
| Package Size: mm2:W x L | 20SSOP: 56 mm2: 7.8 x 7.2(SSOP) PKG |
| Power Consumption(Typ) | 5 mW |
| Rating | HiRel Enhanced Product |
| Reference Mode | Ext |
| Resolution | 12 Bits |
| Sample Rate (max) | 66kSPS SPS |
生态计划
| RoHS | Compliant |
应用须知
- Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
模型线
系列: TLC2543-EP (4)
- TLC2543MDBREP TLC2543QDWREP V62/03614-01XE V62/03614-02YE
制造商分类
- Semiconductors > Space & High Reliability > Data Converter > Analog to Digital Converters