Datasheet Texas Instruments ADS830E/2K5 — 数据表
| 制造商 | Texas Instruments |
| 系列 | ADS830 |
| 零件号 | ADS830E/2K5 |
8位，60MSPS模数转换器（ADC）20-SSOP -40至85
数据表
ADS830: SpeedPlus? 8-Bit, 60MHz Sampling Analog-To-Digital Converter datasheet
PDF, 554 Kb, 修订版: A, 档案已发布: Feb 23, 2001
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 20 |
| Package Type | DBQ |
| Industry STD Term | SSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2500 |
| Carrier | LARGE T&R |
| Device Marking | ADS830E |
| Width (mm) | 3.9 |
| Length (mm) | 8.65 |
| Thickness (mm) | 1.5 |
| Pitch (mm) | .64 |
| Max Height (mm) | 1.75 |
| Mechanical Data | 下载 |
参数化
| # Input Channels | 1 |
| Analog Input BW | 300 MHz |
| Architecture | Pipeline |
| DNL(Max) | 1 +/-LSB |
| DNL(Typ) | 0.1 +/-LSB |
| ENOB | 7.7 Bits |
| INL(Max) | 1.5 +/-LSB |
| INL(Typ) | 0.3 +/-LSB |
| Input Buffer | No |
| Input Range | 1,2 Vp-p |
| Interface | Parallel CMOS |
| Operating Temperature Range | -40 to 85 C |
| Package Group | SSOP |
| Package Size: mm2:W x L | 20SSOP: 52 mm2: 6 x 8.65(SSOP) PKG |
| Power Consumption(Typ) | 215 mW |
| Rating | Catalog |
| Reference Mode | Ext,Int |
| Resolution | 8 Bits |
| SFDR | 65 dB |
| SINAD | 48 dB |
| SNR | 49.5 dB |
| Sample Rate(Max) | 60 MSPS |
生态计划
| RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: TSW2200EVM
TSW2200 Low-Cost Portable Power Supply Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: DEM-ADS830E
Demo Board for ADS830
Lifecycle Status: Active (Recommended for new designs)
应用须知
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- CDCE62005 as Clock Solution for High-Speed ADCsPDF, 805 Kb, 档案已发布: Sep 4, 2008
TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements - Smart Selection of ADC/DAC Enables Better Design of Software-Defined RadioPDF, 376 Kb, 档案已发布: Apr 28, 2009
This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
模型线
制造商分类
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)