[ /Title
(CD54
HCT11
,
CD74
HC11,
CD74
HCT11
)
/Subject
(High CD54HC11, CD74HC11,
CD54HCT11, CD74HCT11
Data sheet acquired from Harris Semiconductor
SCHS273E High-Speed CMOS Logic
Triple 3-Input AND Gate August 1997 -Revised September 2003 Features Description Buffered Inputs The ’HC11 and ’HCT11 logic gates utilize silicon gate CMOS
technology to achieve operating speeds similar to LSTTL
gates with the low power consumption of standard CMOS
integrated circuits. All devices have the ability to drive 10
LSTTL loads. The HCT logic family is functionally pin
compatible with the standard LS logic family. Typical Propagation Delay: 8ns at VCC = 5V,
CL = 15pF, TA = 25oC Fanout (Over Temperature Range)
-Standard Outputs . 10 LSTTL Loads
-Bus Driver Outputs . 15 LSTTL Loads Ordering Information Wide Operating Temperature Range . -55oC to 125oC Balanced Propagation Delay and Transition Times PART NUMBER Significant Power Reduction Compared to LSTTL …