Datasheet Texas Instruments ADS8405IPFBTG4 — 数据表
| 制造商 | Texas Instruments |
| 系列 | ADS8405 |
| 零件号 | ADS8405IPFBTG4 |
16位1.25MSPS单极性输入微功耗采样ADC 48-TQFP -40至85
数据表
ADS8405: 16-Bit, 1.25-MSPS Unipolar Pseuso-Diff Input, Micropower Sampling ADC datasheet
PDF, 1.7 Mb, 档案已发布: Dec 17, 2004
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
打包
| Pin | 48 |
| Package Type | PFB |
| Industry STD Term | TQFP |
| JEDEC Code | S-PQFP-G |
| Package QTY | 250 |
| Carrier | SMALL T&R |
| Device Marking | ADS8405I |
| Width (mm) | 7 |
| Length (mm) | 7 |
| Thickness (mm) | 1 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1.2 |
| Mechanical Data | 下载 |
参数化
| # Input Channels | 1 |
| Analog Voltage AVDD(Max) | 5.25 V |
| Analog Voltage AVDD(Min) | 4.75 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.25 V |
| Digital Supply(Min) | 2.7 V |
| INL(Max) | 2 +/-LSB |
| Input Range(Max) | 4.2 V |
| Input Type | Pseudo-Differential,Single-Ended |
| Integrated Features | Oscillator |
| Interface | Parallel |
| Multi-Channel Configuration | N/A |
| Operating Temperature Range | -40 to 85 C |
| Package Group | TQFP |
| Package Size: mm2:W x L | 48TQFP: 81 mm2: 9 x 9(TQFP) PKG |
| Power Consumption(Typ) | 155 mW |
| Rating | Catalog |
| Reference Mode | Ext,Int |
| Resolution | 16 Bits |
| SINAD | 85 dB |
| SNR | 86 dB |
| Sample Rate (max) | 1.25MSPS SPS |
| Sample Rate(Max) | 1.25 MSPS |
| THD(Typ) | -90 dB |
生态计划
| RoHS | Compliant |
应用须知
- Using ADS8411 in a Multiplexed Analog Input Application (Rev. A)PDF, 2.1 Mb, 修订版: A, 档案已发布: Feb 15, 2006
This application report is intended as a guide for using an analog multiplexer to multiplex several input signals to a single high-resolution, high-speed SAR analog-to-digital converter (ADC). The ADC and the multiplexer used were the ADS8411 and the TS5A3159/3359, respectively. This document discusses the important parameters of a multiplexer and defines a few important measurements for evaluatin - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
模型线
系列: ADS8405 (6)
- ADS8405IBPFBR ADS8405IBPFBT ADS8405IBPFBTG4 ADS8405IPFBR ADS8405IPFBT ADS8405IPFBTG4
制造商分类
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)