Datasheet Texas Instruments ADS42JB69IRGC25 — 数据表
| 制造商 | Texas Instruments |
| 系列 | ADS42JB69 |
| 零件号 | ADS42JB69IRGC25 |
双通道，16位，250MSPS模数转换器（ADC）64-VQFN -40至85
数据表
ADS42JBx9 Dual-Channel, 14- and 16-Bit, 250-MSPS Analog-to-Digital Converters datasheet
PDF, 5.3 Mb, 修订版: F, 档案已发布: Dec 22, 2014
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价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 64 |
| Package Type | RGC |
| Industry STD Term | VQFN |
| JEDEC Code | S-PQFP-N |
| Package QTY | 25 |
| Carrier | SMALL T&R |
| Device Marking | AZ42JB69 |
| Width (mm) | 9 |
| Length (mm) | 9 |
| Thickness (mm) | .88 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1 |
| Mechanical Data | 下载 |
参数化
| # Input Channels | 2 |
| Analog Input BW | 900 MHz |
| Architecture | Pipeline |
| DNL(Max) | 0.6 +/-LSB |
| DNL(Typ) | 0.6 +/-LSB |
| ENOB | 12.3 Bits |
| INL(Max) | 3 +/-LSB |
| INL(Typ) | 3 +/-LSB |
| Input Buffer | Yes |
| Input Range | 2.5 Vp-p |
| Interface | JESD204B |
| Operating Temperature Range | -40 to 85 C |
| Package Group | VQFN |
| Package Size: mm2:W x L | 64VQFN: 81 mm2: 9 x 9(VQFN) PKG |
| Power Consumption(Typ) | 1700 mW |
| Rating | Catalog |
| Reference Mode | Int |
| Resolution | 16 Bits |
| SFDR | 95 dB |
| SINAD | 75.7 dB |
| SNR | 75.9 dB |
| Sample Rate(Max) | 250 MSPS |
生态计划
| RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: ADS42JB69EVM
ADS42JB69 Dual-Channel, 16-Bit, 250-MSPS Analog-to-Digital Converter Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: TSW2170EVM
TSW2170 Crystal Filtered 70MHz Source Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
应用须知
- Correcting the Low-Frequency Response of the ADS42LBxx, ADS42JBxx for Time-DomaiPDF, 338 Kb, 档案已发布: May 2, 2016
In this application report, simple schemes are described to correct the low-frequency response of ADS42LBxx, ADS42JBxx family of analog-to-digital converters (ADCs). The described schemes are useful for time-domain applications where the ADC samples a low-frequency pulse signal. These schemes are simple to implement in either analog or digital domains with minimal changes to the bill of materials - JESD204B multi-device synchronization: Breaking down the requirementsPDF, 146 Kb, 档案已发布: Apr 28, 2015
- LMK04828 as a Clock Source for the ADS42JB69PDF, 1.4 Mb, 档案已发布: Nov 14, 2012
ADS42JB69, ADS42LB69, LMK04828 LMK04828 as a clock source for the ADS42JB69 - Analog Applications Journal 2Q 2015PDF, 2.5 Mb, 档案已发布: Apr 28, 2015
- Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)PDF, 1.2 Mb, 修订版: A, 档案已发布: Jul 19, 2013
- Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)PDF, 2.0 Mb, 修订版: A, 档案已发布: May 22, 2015
- Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015
模型线
系列: ADS42JB69 (3)
- ADS42JB69IRGC25 ADS42JB69IRGCR ADS42JB69IRGCT
制造商分类
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)