Datasheet Texas Instruments THS4121CDGK — 数据表
| 制造商 | Texas Instruments |
| 系列 | THS4121 |
| 零件号 | THS4121CDGK |
3.3 V，100 MHz，43 V / us，全差分CMOS放大器8-VSSOP 0至70
数据表
THS4120, THS4121: High-Speed Fully Differential-I/O Amplifier datasheet
PDF, 1.1 Mb, 修订版: D, 档案已发布: Oct 13, 2004
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 8 |
| Package Type | DGK |
| Industry STD Term | VSSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 80 |
| Carrier | TUBE |
| Device Marking | ATO |
| Width (mm) | 3 |
| Length (mm) | 3 |
| Thickness (mm) | .97 |
| Pitch (mm) | .65 |
| Max Height (mm) | 1.07 |
| Mechanical Data | 下载 |
参数化
| 2nd Harmonic | 79 dBc |
| 3rd Harmonic | 93 dBc |
| @ MHz | 1 |
| Acl, min spec gain | 1 V/V |
| Additional Features | N/A |
| Architecture | CMOS,Fully Differential,Voltage FB |
| BW @ Acl | 100 MHz |
| CMRR(Min) | 64 dB |
| CMRR(Typ) | 96 dB |
| GBW(Typ) | 100 MHz |
| Input Bias Current(Max) | 1.2 pA |
| Iq per channel(Max) | 13.5 mA |
| Iq per channel(Typ) | 11 mA |
| Number of Channels | 1 |
| Offset Drift(Typ) | 25 uV/C |
| Operating Temperature Range | -40 to 85,0 to 70 C |
| Output Current(Typ) | 25 mA |
| Package Group | VSSOP |
| Package Size: mm2:W x L | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) PKG |
| Rail-to-Rail | In to V+,Out |
| Rating | Catalog |
| Slew Rate(Typ) | 55 V/us |
| Total Supply Voltage(Max) | 3.5 +5V=5, +/-5V=10 |
| Total Supply Voltage(Min) | 3 +5V=5, +/-5V=10 |
| Vn at 1kHz(Typ) | 16 nV/rtHz |
| Vn at Flatband(Typ) | 5.4 nV/rtHz |
| Vos (Offset Voltage @ 25C)(Max) | 8 mV |
生态计划
| RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: THS4140EVM
THS4140EVM Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
应用须知
- Fully-Differential Amplifiers (Rev. E)PDF, 867 Kb, 修订版: E, 档案已发布: Sep 19, 2016
Differential signaling has been commonly used in audio, data transmission, and telephone systems for many years because of its inherent resistance to external noise sources. Today, differential signaling is becoming popular in high-speed data acquisition, where the ADC’s inputs are differential and a differential amplifier is needed to properly drive them.Two other advantages of di - High-Voltage Signal Conditioning for Differential ADCsPDF, 125 Kb, 档案已发布: Jun 14, 2004
Analog designers are frequently required to convert high-voltage signals to levels acceptable to low-voltage data converters with differential inputs. This paper describes solutions for this common task using modern amplifiers and typical power supplies. Three examples of conditioning В±10V bipolar signals for low-voltage analog-to-digital converters (ADCs) are shown: a single-supply design, - Noise Analysis for High Speed Op Amps (Rev. A)PDF, 256 Kb, 修订版: A, 档案已发布: Jan 17, 2005
As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu
模型线
系列: THS4121 (12)
制造商分类
- Semiconductors > Amplifiers > Operational Amplifiers (Op Amps) > High-Speed Op Amps (>=50MHz)