Datasheet Texas Instruments THS4304DR — 数据表
制造商 | Texas Instruments |
系列 | THS4304 |
零件号 | THS4304DR |
宽带运算放大器8-SOIC -40至85
数据表
价格
状态
Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
Manufacture's Sample Availability | No |
打包
Pin | 8 |
Package Type | D |
Industry STD Term | SOIC |
JEDEC Code | R-PDSO-G |
Width (mm) | 3.91 |
Length (mm) | 4.9 |
Thickness (mm) | 1.58 |
Pitch (mm) | 1.27 |
Max Height (mm) | 1.75 |
Mechanical Data | 下载 |
参数化
2nd Harmonic(dBc) | 84 |
3rd Harmonic(dBc) | 100 |
@ MHz | 10 |
Acl, min spec gain(V/V) | 1 |
Additional Features | N/A |
Approx. Price (US$) | 2.41 | 1ku |
Architecture | Bipolar Voltage FB |
BW @ Acl(MHz) | 3000 |
CMRR(Min)(dB) | 80 |
CMRR(Typ)(dB) | 95 |
GBW(Typ)(MHz) | 3000 |
Input Bias Current(Max)(pA) | 12000000 |
Iq per channel(Max)(mA) | 18.9 |
Iq per channel(Typ)(mA) | 18 |
Number of Channels(#) | 1 |
Offset Drift(Typ)(uV/C) | 5 |
Operating Temperature Range(C) | -40 to 85 |
Output Current(Typ)(mA) | 100 |
Package Group | SOIC |
Package Size: mm2:W x L (PKG) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) |
Rail-to-Rail | In Out |
Rating | Catalog |
Slew Rate(Typ)(V/us) | 790 |
Total Supply Voltage(Max)(+5V=5, +/-5V=10) | 5 |
Total Supply Voltage(Min)(+5V=5, +/-5V=10) | 2.7 |
Vn at Flatband(Typ)(nV/rtHz) | 2.4 |
Vos (Offset Voltage @ 25C)(Max)(mV) | 4 |
生态计划
RoHS | Not Compliant |
Pb Free | No |
设计套件和评估模块
- Evaluation Modules & Boards: THS4304DGKEVM
THS4304 Evaluation Module for DGK Package
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: THS4304DBVEVM
THS4304 Evaluation Module for DBV Package
Lifecycle Status: Active (Recommended for new designs)
应用须知
- RF and IF amplifiers with op ampsPDF, 177 Kb, 档案已发布: Feb 28, 2005
- Wideband Complementary Current Output DAC Single-Ended InterfacePDF, 597 Kb, 档案已发布: Jun 21, 2005
High-speed digital-to-analog converters (DACs) most often use a transformer-coupled output stage. In applications where this configuration is not practical, a single op ampdifferential to single-ended stage has often been used. This application note steps through the exact design equations required to achieve gain matching from each output as well as a matched input impedance to each of the DA - Noise Analysis for High Speed Op Amps (Rev. A)PDF, 256 Kb, 修订版: A, 档案已发布: Jan 17, 2005
As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu
模型线
系列: THS4304 (9)
制造商分类
- Semiconductors > Amplifiers > Operational Amplifiers (Op Amps) > High-Speed Op Amps (>=50MHz)