Datasheet Texas Instruments SN74LVTH16244AGRDR — 数据表
| 制造商 | Texas Instruments |
| 系列 | SN74LVTH16244A |
| 零件号 | SN74LVTH16244AGRDR |
具有三态输出的3.3V ABT 16位缓冲器/驱动器54-BGA MICROSTAR JUNIOR -40至85
数据表
3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS, SNx4LVTH16244A datasheet
PDF, 968 Kb, 修订版: U, 档案已发布: Oct 11, 2013
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价格
状态
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No |
打包
| Pin | 54 |
| Package Type | GRD |
| Industry STD Term | BGA MICROSTAR JUNIOR |
| JEDEC Code | R-PBGA-N |
| Width (mm) | 5.5 |
| Length (mm) | 8 |
| Thickness (mm) | .8 |
| Pitch (mm) | .8 |
| Max Height (mm) | 1.2 |
| Mechanical Data | 下载 |
替代品
| Replacement | SN74LVTH16244AZRDR |
| Replacement Code | P |
参数化
| Approx. Price (US$) | 0.52 | 1ku |
| Bits(#) | 16 |
| F @ Nom Voltage(Max)(Mhz) | 160 |
| ICC @ Nom Voltage(Max)(mA) | 0.005 |
| Input Type | TTL/CMOS |
| Operating Temperature Range(C) | -40 to 125 -40 to 85 |
| Output Drive (IOL/IOH)(Max)(mA) | -32/64 |
| Output Type | LVTTL |
| Package Group | BGA MICROSTAR JUNIOR |
| Package Size: mm2:W x L (PKG) | 56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR) |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | LVT |
| VCC(Max)(V) | 3.6 |
| VCC(Min)(V) | 2.7 |
| Voltage(Nom)(V) | 3.3 |
| tpd @ Nom Voltage(Max)(ns) | 4.1 |
生态计划
| RoHS | Not Compliant |
| Pb Free | No |
应用须知
- LVT Family Characteristics (Rev. A)PDF, 98 Kb, 修订版: A, 档案已发布: Mar 1, 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti - LVT-to-LVTH ConversionPDF, 84 Kb, 档案已发布: Dec 8, 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed. - Bus-Hold CircuitPDF, 418 Kb, 档案已发布: Feb 5, 2001
When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
模型线
系列: SN74LVTH16244A (12)
制造商分类
- Semiconductors > Logic > Buffer/Driver/Transceiver > Non-Inverting Buffer/Driver