定点/浮点数字信号处理器361-NFBGA 0至90
PDF, 26 Kb, 档案已发布: Jul 20, 2009
This article has been contributed to the TI DaVinciв„ў and OMAPв„ў Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:http://tiexpressdsp.com/index.php/C6748/46/42_Complementary_Products .This Wiki article serves as a repository of complimentary devices tha
PDF, 1.6 Mb, 修订版: F, 档案已发布: Jan 23, 2014
This application report describes various boot mechanisms supported by the C6748/C6746/C6742 bootloader read-only memory (ROM) image. Topics covered include the Application Image Script (AIS) boot process, an AISgen tool used to generate boot scripts, protocol for booting the device from an external master device, a UART Boot Host GUI for booting the device from a host PC, and any limitations, def
PDF, 19 Kb, 档案已发布: Aug 30, 2010
This article discusses the power consumption of the Texas Instruments C6748/46/42. Power consumption on the C6748/46/42 devices are highly application-dependent. The low-core voltage and other power design optimizations allow these devices to operate with industry-leading performance, while maintaining a low power-to-performance ratio.The power data presented in this document are based on mea
PDF, 312 Kb, 档案已发布: Dec 19, 2011
This document details the design considerations of a power solution for the TMS320C742,TMS320C6746, and TMS320C6748 (TMS320C6742/C6746/C6748) low-power application processor witha TPS650061, three-rail power management unit (PMU) or power management integrated circuit (PMIC).Portable application solution size demands a high level of integration and the TMS320C6742/C6746/C6748 requires at l
PDF, 37 Kb, 修订版: B, 档案已发布: Sep 27, 2013
The OMAP-L1x8 and C6742/6/8 devices use a great deal of internal pin multiplexing to allow the most functionality in the smallest and lowest cost package. This software allows the pin multiplexing registers of the device to be calculated with ease, as well as showing what peripherals can be used together and what devices support the peripherals that are selected. This software is useful to anyone
PDF, 387 Kb, 修订版: B, 档案已发布: Aug 29, 2011
This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, or OMAP-L132/L138 processor. Using sequenced power supplies, this reference design describes a system having a 3.3-V input voltage and a high-efficiency dc/dc converter with integrated FETs for a small, simple design.Sequenced power supply architectures are becoming commonplace in high-performan
PDF, 150 Kb, 修订版: B, 档案已发布: Aug 29, 2011
This reference design helps those desiring to design-in the TMS320C6742, TMS320C6746, TMS320C6748, and OMAP-L132/L138. This design, employing sequenced power supplies, describes asystem with an input voltage of 3.3 V, and uses LDOs for a small, simple system.Sequenced power supply architectures are becoming commonplace in high-performance microprocessor and digital signal processor (DSP) syste
PDF, 266 Kb, 修订版: C, 档案已发布: Aug 29, 2011
This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, or OMAP-L132/L138 processor. Using sequenced power supplies, this reference design describes a system having a 12-V input voltage and a high-efficiency dc/dc converter with integrated FETs and dynamic voltage and frequency scaling (DVFS) for a small, simple design.Sequenced power supply architec
PDF, 208 Kb, 修订版: A, 档案已发布: May 5, 2010
This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, OMAP-L138 or AM18x processor. Using sequenced power supplies, this reference design describes a system having a 12-V input voltage and a high-efficiency dc/dc converter with ntegrated FETs and dynamic voltage and frequency scaling (DVFS) for a small, simple design.Sequenced power supply archit
PDF, 161 Kb, 修订版: A, 档案已发布: May 5, 2010
This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, OMAP-L138 or AM18x processor. Using sequenced power supplies, this reference design describes a system having a 12-V input voltage and a high-efficiency dc/dc converter with ntegrated FETs and dynamic voltage and frequency scaling (DVFS) for a small, simple design.Sequenced power supply archit
PDF, 1.1 Mb, 档案已发布: Aug 17, 2009
This application report describes the TMS320C6748/46/42 and OMAP-L1x8 electrical compliance of a high-speed (HS) universal serial bus (USB) operation conforming to the USB 2.0 specification. The on-the-go (OTG) controller supports the USB 2.0 device and host mode at high-speed (HS), full-speed (FS) and low-speed (LS).
PDF, 3.6 Mb, 档案已发布: Aug 17, 2009
This application report describes the TMS320C6748/46/42 and OMAP-L1x8 embedded Host electrical compliance of a high-speed (HS) universal serial bus (USB) operation conforming to the USB 2.0 specification. The OTG controller supports the USB 2.0 device and host mode at high-speed (HS), full-speed (FS) and low-speed (LS).
PDF, 89 Kb, 档案已发布: Mar 12, 2009
This application report contains the USB checklist for the TMS320C674x/OMAP-L1x (C674x/OMAP-L1x). The C674x/OMAP-L1x has a compliant full-speed USB device port and does not support a low-speed USB device operation.
PDF, 19 Kb, 档案已发布: Feb 12, 2010
This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:http://wiki.davincidsp.com/index.php/OMAP-L1x/C674x/AM1x_SOC_Architecture_and_Throughput_Overview. This collection of Wiki articles provide i
PDF, 62 Kb, 档案已发布: Jan 13, 2016
This application report provides benchmarks for the C674x DSP core, the C66x DSP core and the ARMВ®CortexВ®-A15 core. This document also shows how to reproduce these benchmarks on specific hardware platforms.
PDF, 814 Kb, 修订版: G, 档案已发布: Jul 27, 2017
As modern bus interface frequencies scale higher, care must be taken in the printed circuit board (PCB) layout phase of a design to ensure a robust solution.
PDF, 535 Kb, 档案已发布: Oct 6, 2011
The TMS320C6000™ Digital Signal Processors (DSPs) have many architectural advantages that make them ideal for computation-intensive real-time applications. However to fully leverage the architectural features that C6000™ processors offer code optimization may be required. First this document reviews five key concepts in understanding the C6000 DSP architecture and optimization. Then
