Datasheet Texas Instruments ADS8342IPFBTG4 — 数据表
| 制造商 | Texas Instruments |
| 系列 | ADS8342 |
| 零件号 | ADS8342IPFBTG4 |
16位250 kSPS ADC并行输出，4个真双极性通道48-TQFP -40至85
数据表
ADS8342: 16-Bit, 250kSPS, 4-Channel, Parallel Output Analog-to-Digital Converter datasheet
PDF, 1.5 Mb, 档案已发布: Feb 6, 2003
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 48 |
| Package Type | PFB |
| Industry STD Term | TQFP |
| JEDEC Code | S-PQFP-G |
| Package QTY | 250 |
| Carrier | SMALL T&R |
| Device Marking | ADS8342I |
| Width (mm) | 7 |
| Length (mm) | 7 |
| Thickness (mm) | 1 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1.2 |
| Mechanical Data | 下载 |
参数化
| # Input Channels | 4 |
| Analog Voltage AVDD(Max) | 5.25 V |
| Analog Voltage AVDD(Min) | -5.25 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.5 V |
| Digital Supply(Min) | 2.7 V |
| INL(Max) | 4 +/-LSB |
| Input Range(Max) | 2.5 V |
| Input Range(Min) | -2.5 V |
| Input Type | Pseudo-Differential,Single-Ended |
| Integrated Features | N/A |
| Interface | Parallel |
| Multi-Channel Configuration | Multiplexed |
| Operating Temperature Range | -40 to 85 C |
| Package Group | TQFP |
| Package Size: mm2:W x L | 48TQFP: 81 mm2: 9 x 9(TQFP) PKG |
| Power Consumption(Typ) | 208 mW |
| Rating | Catalog |
| Reference Mode | Ext |
| Resolution | 16 Bits |
| SINAD | 84.6 dB |
| SNR | 86 dB |
| Sample Rate (max) | 250kSPS SPS |
| Sample Rate(Max) | 0.25 MSPS |
| THD(Typ) | -89 dB |
生态计划
| RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: ADS8342EVM
ADS8342 Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
应用须知
- ADS8342 ADC SAR InputsPDF, 223 Kb, 档案已发布: Jan 6, 2005
Successive approximation register analog-to-digital converters (SAR ADCs) present a challenging load to the circuitry that drives the analog inputs. Specifications in data sheets may mislead the user into thinking that analog inputs, for example, are static, when in fact they create a highly dynamic load that requires specially designed buffer circuitry. This article looks at the architecture of - Controlling the ADS8342 with TMS320 Series DSP'sPDF, 109 Kb, 档案已发布: Sep 22, 2003
The ADS8342 16-bit, bipolar input, parallel output analog-to-digital converter has a number of features that allow for an easy interface to many of the TMS320? DSP family of digital signal processors from Texas Instruments. This application note focuses on configuring, sampling, and converting analog data presented to the ADS8342 ADC, with software examples using the TMS320C6711 and C5416 DSPs. Th - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
模型线
系列: ADS8342 (3)
- ADS8342IBPFBT ADS8342IPFBT ADS8342IPFBTG4
制造商分类
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)