Datasheet Texas Instruments TLV1572CDR — 数据表
| 制造商 | Texas Instruments |
| 系列 | TLV1572 |
| 零件号 | TLV1572CDR |
10位1.25MSPS ADC单通道，DSP /（Q）SPI IF，S＆H，超低功耗，自动掉电8-SOIC 0至70
数据表
2.8V to 5.5V 10-Bit 1.25 MSPS Serial A-D Converter With Auto-Power-Down datasheet
PDF, 732 Kb, 修订版: A, 档案已发布: Sep 4, 1998
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 8 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2500 |
| Carrier | LARGE T&R |
| Device Marking | V1572C |
| Width (mm) | 3.91 |
| Length (mm) | 4.9 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | 下载 |
参数化
| # Input Channels | 1 |
| Analog Voltage AVDD(Max) | 5.5 V |
| Analog Voltage AVDD(Min) | 2.7 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.5 V |
| Digital Supply(Min) | 2.7 V |
| INL(Max) | 1 +/-LSB |
| Input Range(Max) | 5.5 V |
| Input Type | Single-Ended |
| Integrated Features | N/A |
| Interface | SPI |
| Multi-Channel Configuration | N/A |
| Operating Temperature Range | -40 to 85,0 to 70 C |
| Package Group | SOIC |
| Package Size: mm2:W x L | 8SOIC: 29 mm2: 6 x 4.9(SOIC) PKG |
| Power Consumption(Typ) | 8 mW |
| Rating | Catalog |
| Reference Mode | Ext |
| Resolution | 10 Bits |
| SINAD | 60 dB |
| SNR | 62 dB |
| Sample Rate (max) | 1.25MSPS SPS |
| Sample Rate(Max) | 1.25 MSPS |
| THD(Typ) | -60 dB |
生态计划
| RoHS | Compliant |
应用须知
- Low-power data acquisition sub-system using the TI TLV1572PDF, 230 Kb, 档案已发布: Mar 11, 2005
- Interfacing the TLV1572 Analog-to-Digital Converter to the TMS320C203 DSP (Rev. B)PDF, 135 Kb, 修订版: B, 档案已发布: May 11, 1999
This application report presents a hardware solution for interfacing the TLV1572 10-bit, 1.25 MSPS (Mega Samples Per Second), successive low-power analog-to-digital converter (ADC) to the TMS320C203 16-bit fixed-point digital signal processor (DSP). In addition, a C-callable interface program is shown which supports the data transfer between ADC and DSP. - Low-Power Signal Conditioning For A Pressure Sensor (Rev. A)PDF, 469 Kb, 修订版: A, 档案已发布: May 18, 2015
- Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
模型线
系列: TLV1572 (8)
制造商分类
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)