Datasheet Texas Instruments TMS320C6652CZH6 — 数据表

制造商	Texas Instruments
系列	TMS320C6652
零件号	TMS320C6652CZH6

定点和浮点数字信号处理器625-FCBGA 0至85

数据表

下载

PDF, 1.7 Mb, 修订版: D, 档案已发布: Jun 22, 2016

从文件中提取

价格

状态

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

打包

Pin	625	625	625
Package Type	CZH	CZH	CZH
Package QTY	1	1	1
Carrier	NOT REQUIRED	NOT REQUIRED	NOT REQUIRED
Device Marking	TMS320C6652CZH	@2012 TI	600MHZ
Width (mm)	21	21	21
Length (mm)	21	21	21
Thickness (mm)	2.42	2.42	2.42
Mechanical Data	下载	下载	下载

参数化

Applications	Machine Vision
DRAM	DDR3
DSP	1 C66x
DSP MHz	600 Max.
GFLOPS	9.6
On-Chip L2 Cache	1024 KB
Operating Temperature Range	-40 to 100,0 to 85 C
Other On-Chip Memory	1024 KB
Package Size: mm2:W x L	See datasheet (FCBGA) PKG
Rating	Catalog
Serial I/O	I2C,SPI,UART,UPP
Total On-Chip Memory	1088 KB

生态计划

RoHS

Compliant

设计套件和评估模块

Evaluation Modules & Boards: TMDSEVM6657
TMS320C6657 Lite Evaluation Modules
Lifecycle Status: Active (Recommended for new designs)

应用须知

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TMS320C66x DSP Generation of Devices (Rev. A)
PDF, 245 Kb, 修订版: A, 档案已发布: Apr 25, 2011
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Hardware Design Guide for KeyStone Devices (Rev. C)
PDF, 1.7 Mb, 修订版: C, 档案已发布: Sep 15, 2013
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KeyStone I DDR3 Initialization (Rev. E)
PDF, 114 Kb, 修订版: E, 档案已发布: Oct 28, 2016
The initialization of the DDR3 DRAM controller on KeyStone I DSPs is straightforward as long as the proper steps are followed. However, if some steps are omitted or if some sequence-sensitive steps are implemented in the wrong order, DDR3 operation will be unpredictable.All DDR3 initialization routines must contain the basic register writes to configure the memory controller within the DSP
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AN-1281 Bumped Die (Flip Chip) Packages (Rev. A)
PDF, 2.2 Mb, 修订版: A, 档案已发布: May 1, 2004
Application Note 1281 Bumped Die (Flip Chip) Packages
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The C6000 Embedded Application Binary Interface Migration Guide (Rev. A)
PDF, 20 Kb, 修订版: A, 档案已发布: Nov 10, 2010
The C6000 compiler tools support a new ELF-based ABI named EABI. Prior to this time, the compiler only supported a single ABI, which is now named COFF ABI. The following compelling best-in-class features are available under the C6000 EABI:GeneralZero-init globals: вЂњint gvar;вЂќ gets set to 0 before main runs.Dynamic linking: Add code to a running system.Native ROM
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Clocking Design Guide for KeyStone Devices
PDF, 1.5 Mb, 档案已发布: Nov 9, 2010
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Optimizing Loops on the C66x DSP
PDF, 585 Kb, 档案已发布: Nov 9, 2010
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DDR3 Design Requirements for KeyStone Devices (Rev. B)
PDF, 582 Kb, 修订版: B, 档案已发布: Jun 5, 2014
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TI DSP Benchmarking
PDF, 62 Kb, 档案已发布: Jan 13, 2016
This application report provides benchmarks for the C674x DSP core, the C66x DSP core and the ARMВ®CortexВ®-A15 core. This document also shows how to reproduce these benchmarks on specific hardware platforms.
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Plastic Ball Grid Array [PBGA] Application Note (Rev. B)
PDF, 1.6 Mb, 修订版: B, 档案已发布: Aug 13, 2015

模型线

系列: TMS320C6652 (2)

TMS320C6652CZH6 TMS320C6652CZHA6

制造商分类

Semiconductors > Processors > Digital Signal Processors > C6000 DSP > C66x DSP