Datasheet Texas Instruments ADS7863IDBQG4 — 数据表

制造商Texas Instruments
系列ADS7863
零件号ADS7863IDBQG4
Datasheet Texas Instruments ADS7863IDBQG4

双通道,2MSPS,12位,3 + 3或2 + 2通道,同时采样模数SAR转换器24-SSOP -40至125

数据表

Dual, 2MSPS, 12-Bit, 2 + 2 or 3 + 3 Channel, Simultaneous Sampling ADC datasheet
PDF, 1.2 Mb, 修订版: E, 档案已发布: Jan 19, 2011
从文件中提取

价格

状态

Lifecycle StatusNRND (Not recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin24
Package TypeDBQ
Industry STD TermSSOP
JEDEC CodeR-PDSO-G
Package QTY50
CarrierTUBE
Device MarkingADS7863I A
Width (mm)3.9
Length (mm)8.65
Thickness (mm)1.5
Pitch (mm).64
Max Height (mm)1.75
Mechanical Data下载

生态计划

RoHSCompliant

应用须知

  • An Introduction to the ADS7863A
    PDF, 153 Kb, 档案已发布: Apr 10, 2013
  • Interfacing the ADS786x to TMS470 Processors
    PDF, 59 Kb, 档案已发布: Jul 10, 2006
    This application report presents methods of interfacing the ADS7866/67/68 12/10/8-bit SAR analog-to-digital converter to the serial peripheral interface (SPI) port of the TMS470 processors. The flexible clocking scheme of the TMS470 SPI port, along with its internal 16-bit shift register provides an easy hardware/software interface to this series of high-speed, micro power SAR converters.
  • Interfacing the ADS786x to the MSP430F2013
    PDF, 90 Kb, 档案已发布: Jun 15, 2006
    This application report presents methods of interfacing the ADS7866/67/68 12/10/8-bit SAR analog-to-digital converter to the MSP430F2013 universal serial interface (USI) in SPI mode. The flexible clocking scheme of the USI port, along with the internal 16-bit shift register, provides an easy hardware/software interface to this series of high-speed, micro-power SAR converters.
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015

模型线

制造商分类

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)