This application report describes how to interface the Motorola MC68360 quad integrated communications controller (QUICC) to the Expansion Bus of the Texas Instruments TMS320C6000в„ў (C60000в„ў) digital signal processor (DSP). The document contains the following elements:A block diagram of the interface and PAL equations.Information required to configure the MC68360.
PDF, 559 Kb, 档案已发布: Feb 7, 2000
The expansion bus is a 32-bit wide bus that supports interfaces to PCI bridge chips, to synchronous or asynchronous external masters, to a variety of asynchronous peripherals, and to asynchronous or synchronous FIFOs. The expansion bus has two major subblocks?the I/O port and host port Interface. This application report discusses performance of the TMS320C6000? expansion bus host port. The expansi
PDF, 195 Kb, 修订版: B, 档案已发布: Aug 31, 2001
This application report describes how to interface the TMS320C6000в„ў (C6000в„ў) digital signal processor (DSP) expansion bus to the Motorola MPC860 microprocessor. This document contains:A block diagram of the interface and PAL equationsInformation required for configuring the MPC680Timing diagrams illustrating the interface functionality
PDF, 120 Kb, 修订版: B, 档案已发布: Aug 31, 2001
This application report describes how to interface the Texas Instruments (TI) TMS320C6000в„ў (C6000в„ў) digital signal processor (DSP) to the Intel 80960Kx/Jx microprocessor. This document contains:A block diagram of the interfaceInformation required to configure the Intel80960Timing diagrams illustrating the interface functionality
PDF, 257 Kb, 修订版: A, 档案已发布: Aug 31, 2001
This application report describes how to interface the Texas Instruments (TI) TMS320C6000в„ў digital signal processor (DSP) expansion bus to the peripheral component interconnect (PCI) bus using the PCI9080 bridge chip from PLX Technologies.This document contains:A block diagram of the interfaceInformation required to configure the PCI9080Timing diagrams illustratin
PDF, 225 Kb, 修订版: D, 档案已发布: Nov 11, 2002
Development can begin now for Texas Instruments TMS320C6202, C6202B, C6203B, and C6204 digital signal processor (DSP) systems.Because of the compatibility between TMS320C6000в„ў generation devices, existing C6000в„ў tools and development platforms can be used to develop code for the current TMS320C62xв„ў generation and other future devices. This capability allows systems to be up an
PDF, 168 Kb, 修订版: A, 档案已发布: Aug 15, 2001
You can easily interface multiple TMS320C6000в„ў (C6000в„ў) DSP devices to each other by way of a direct connection of the expansion bus (XBus). Each device's XBus I/O port masters the other's XBus host port configured for asynchronous slave mode.This application report highlights the XBus asynchronous host mode and XBus asynchronous I/O mode and explains the interface used to connect t
PDF, 125 Kb, 修订版: A, 档案已发布: Aug 16, 2000
In a real-time system, data flow is important to understand and control to achieve high performance. By analyzing the timing characteristics for accessing data and switching between data requestors, it is possible to maximize the achievable bandwidth in any system. This application note provides relevant information for TMS320C62x devices (such as the C6201(B), C6202(B), C6203, C6204, C6205, and C
PDF, 383 Kb, 修订版: A, 档案已发布: Feb 19, 2002
This set of programs has been compiled to provide a way to verify the integrity of internal DSP memory and external system memory for all devices currently in the TMS320C6000в„ў (C6000) family. Included with the memory test are all source files, the Code Composer Studio? project file, and the linker command file. The source files contain the necessary parameters to test all devices within the
PDF, 83 Kb, 修订版: B, 档案已发布: Jan 4, 2000
This document provides a detailed description of the implementation of the GSM enhanced full rate (EFR) speech encoder and decoder (codec) on the Texas Instruments (TI)(tm)TMS320C62x digital signal processor (DSP). Topics include program structure, code writing rules, data/program memory requirement, and performance evaluation. Issues on multichannel implementation and interrupts are also addresse
PDF, 74 Kb, 修订版: B, 档案已发布: Jan 4, 2000
This document provides a detailed description of the implementation of the G.729 speech encoder and decoder (codec) on the Texas Instruments (TI)(tm) TMS320C6201 digital signal processor (DSP). Topics include program structure, code writing rules, data/program memory requirements, and performance evaluation. Issues regarding multichannel implementation and interrupts are also addressed.Source
PDF, 92 Kb, 修订版: B, 档案已发布: Jan 4, 2000
This application report provides a detailed description of the implementation of the IS-12 enhanced variable rate speech codec (EVRC) on the Texas Instrument (TI)(tm) TMS320C62x digital signal processor (DSP). Topics include program structure, code writing rules, data/program memory requirements, and performance evaluation. Issues on multichannel implementation and interrupts are also addressed.
PDF, 80 Kb, 档案已发布: Feb 29, 2000
This application report describes the implementation of the MPEG-2 video decoder on the TMS320C62x(tm)DSP. The MPEG-2 video standard specifies the decompression and coded representation for entertainment-quality digital video, and is widely used in different digital video systems including DVB, DTV, DVD, DSS, etc. The decoder software implements all the MPEG-2 main-profile-at-main-level functional
PDF, 219 Kb, 档案已发布: Jul 29, 1999
This application report describes the implementation of MPEG-4 motion compensation on the Texas Instruments (TI)(tm) TMS320C62x digital signal processor (DSP). MPEG-4 is a standard for coding of audiovisual information being developed by the Motion Picture Experts Group (MPEG). MPEG-4 became an International Standard in December 1998. Motion compensation is a basic component of MPEG-4 and other vi
PDF, 177 Kb, 档案已发布: Nov 23, 2002
This paper discusses a method by which the Texas Instruments (TI)(tm) TMS320C62xx or C62xx high performance fixed point DSPs overcome the traditional advantage held by floating point DSPs -- precision and speed.Using the Radix-4 Fast Fourier Transform (FFT), this document illustrates how extended precision arithmetic, multiplication in particular, can be performed on the 'C62xx. Using the te
PDF, 116 Kb, 修订版: B, 档案已发布: Jan 4, 2000
This application report describes how the G.723.1 Dual-Rate Speech Coder has been implemented on the TMS320C62x digital signal processor (DSP). Beyond the use of the ?C62x intrinsic functions, the application report includes specific changes required to allow this coder to operate in a real-time system with other speech coders. Also reported is information on several optimization techniques used t
PDF, 51 Kb, 修订版: A, 档案已发布: Nov 13, 2000
Many standard vocoders follow the European Telecommunications Standards Institute (ETSI) for all math operations. One of the purposes of the ETSI math functions is to standardize all math operations into a set of function calls that can be reused by many different vocoders now and in the future.The Global Systems for Mobile Communications (GSM) standard requires vocoders that follow the ETSI s
PDF, 293 Kb, 修订版: C, 档案已发布: Sep 9, 2008
This document describes how to use the multichannel buffered serial port (McBSP) in the Texas Instruments (TI) TMS320C6000в„ў (C6000в„ў) digital signal processors (DSP) to interface to a universal asynchronous receiver/transmitter (UART). Descriptions of the hardware configuration and software routines necessary for proper functionality are included.The McBSP is not capable of support
PDF, 864 Kb, 修订版: A, 档案已发布: Apr 10, 2002
The TMS320C6000? on-chip direct memory access (DMA) controller from Texas Instruments is used to transfer data between two locations in the memory map in the background of CPU operation. Typically, the DMA is used to:Transfer blocks of data between external and internal data memoriesRestructure portions of internal data memoryContinually service a peripheralPage program s
PDF, 50 Kb, 档案已发布: Jan 31, 2000
Modern audio and video compression algorithms usually take the advantage of logarithmic characteristics of human ears and eyes. This approach greatly reduces the redundancy in signals being processed. However, it poses a requirement on fixed-point DSPs to handle these logarithmic and exponential operations.This application report provides a general guide to implement these operations on fixed-
PDF, 309 Kb, 修订版: A, 档案已发布: Sep 30, 2001
This application report describes the architecture and capabilities of the AMCC S5933 PCI controller and how it can be interfaced to the TMS320C6201 digital signal processor (DSP). The DSP's host port interface (HPI) can be a PCI target, and its external memory interface (EMIF) can be used to support PCI bus mastering. Details on the signals and logic required to implement both PCI slave and maste
PDF, 129 Kb, 修订版: A, 档案已发布: Aug 15, 2001
This document describes how to provide the Texas Instruments TMS320C6000в„ў DSP with a system clock. All of the clocks internal to the C6000в„ў are generated from a single source through the CLKIN pin. This source clock for the device is an external signal that, depending on the clock mode, either drives the on-chip Phase-Locked Loop (PLL) circuit, which multiplies the source clock in freq
PDF, 93 Kb, 档案已发布: Sep 8, 1999
This document describes how to use the multichannel buffered serial port (McBSP) in the Texas Instruments (TI)(TM) TMS320C6000 digital signal processors (DSP) to interface with devices that conform to the Inter-IC Sound (I2S) specification. I2S is a protocol for transmitting two channels of digital audio data over a single serial connection.The flexible McBSP in the TMS320C6000 supports the I
PDF, 284 Kb, 修订版: A, 档案已发布: May 21, 2001
This document describes how the multi-channel buffered serial port (McBSP) in the Texas Instruments (TI) TMS320C6000? (C6000?) digital signal processor (DSP) family is used to communicate to an ISDN Oriented Modular Interface Revision 2 (IOM-2) bus-compliant device. This document also describes the usage of McBSP registers and sample code to perform the above function.
PDF, 172 Kb, 修订版: A, 档案已发布: Sep 12, 2000
This application report explains how circular buffering is implemented on the TMS320C6000? devices. Circular buffering helps to implement finite impulse response (FIR) filters efficiently. Filters require delay lines or buffers of past (and current) samples. Circular addressing simplifies the manipulation of pointers in accessing the data samples.This application report addresses the following
PDF, 471 Kb, 修订版: A, 档案已发布: Feb 13, 2002
Interfacing external flash memory to the Texas Instruments TMS320C6000в„ў digital signal processor (DSP) is simple compared to previous generations of TI DSPs. The TMS320C6000 advanced external memory interface (EMIF) provides a glueless interface to a variety of external memory devices.This document describes the following:EMIF control registers and asynchronous interface signals<
PDF, 154 Kb, 档案已发布: Dec 7, 1999
The first optimization step that you can perform on C source code for the TMS320C62xx is to use intrinsic operators. Intrinsics are used like functions and produce assembly language statements that would otherwise be inexpressible in C. The problem is that once you have performed the first optimization step, your C source code is no longer ANSI C compatible. The code proposed within this appli
PDF, 257 Kb, 修订版: A, 档案已发布: Oct 31, 2001
This application report describes how to use the multichannel buffered serial port (McBSP) in the Texas Instruments TMS320C6000в„ў digital signal processor (DSP) for data packing. Data packing involves moving either multiple successive 8-bit elements to/from the McBSP as a single 16/24/32-bit element or multiple successive 16-bit words to/from the McBSP as a single 32-bit word.The McBSP
PDF, 232 Kb, 修订版: C, 档案已发布: Mar 8, 2004
The TMS320C6000? multichannel buffered serial port (McBSP) can operate in a variety of modes, as per application requirements. For proper operation, the serial port must be initialized in a specific order. This document describes the initialization steps necessary when either the (E)DMA or the CPU is used to service the McBSP data. Typically, the (E)DMA is used to perform read/write transfers from
PDF, 289 Kb, 修订版: A, 档案已发布: Jul 10, 2001
This document describes how to use the multichannel buffered serial ports (McBSPs) in the Texas Instruments TMS320C6000в„ў digital signal processor (DSP) as a digital controller for an audio codec 1997 device.The McBSP is connected to a stereo audio codec 1997 device. This application report uses the TLV320AIC27 audio codec (AIC27) as an example. The audio codec 1997 (AC'97) standard spec
PDF, 89 Kb, 修订版: C, 档案已发布: Apr 2, 2002
Designing a TMS320C6000в„ў DSP board to utilize all of the functionality of the JTAG scan path is a simple process, but a few considerations must be taken into account. The default state of the emulation signals determines whether the JTAG port is used for emulation or for boundary scan. It is therefore necessary to provide flexibility in the design to accommodate those modes that are desired.
PDF, 185 Kb, 修订版: D, 档案已发布: Apr 26, 2004
Texas Instruments TMS320C6000в„ў digital signal processors (DSPs) provide a variety of boot configurations that determine which actions are performed after device reset, to prepare for initialization. The boot process is determined by latching the boot configuration settings at reset.The boot process performed by the DSP is to either load code from an external read-only memory (ROM) space
PDF, 833 Kb, 修订版: E, 档案已发布: Sep 4, 2007
Interfacing external SDRAM to the Texas Instruments TMS320C6000™ digital signal processor (DSP) is simple, compared to previous generations of TI DSPs, because of the advanced external memory interface (EMIF). The EMIF is a glueless interface to a variety of external memory devices.This application report describes the EMIF’s control registers and SDRAM signals along with SDRAM function
PDF, 118 Kb, 修订版: A, 档案已发布: Aug 31, 2001
Interfacing external asynchronous static RAM (ASRAM) to the Texas Instruments (TIв„ў) TMS320C6000 series of digital signal processors (DSPs) is simple compared to previous generations of TI DSPs, thanks to the advanced external memory interface (EMIF). The EMIF provides a glueless interface to a variety of external memory devices.This document describes:EMIF control registers and ASR
PDF, 240 Kb, 修订版: A, 档案已发布: Jul 23, 2001
This document describes how to interface the multichannel buffered serial port (McBSP) in the TMS320C6000? digital signal processor (DSP) to a voice band audio processor (VBAP). The VBAP under discussion is the TI TLV320AC56, 3V, 2.048 MHz audio processor which is a m-law companding device. The interface is also applicable to TI?s TLV320AC57, an A-law companding audio processor.The highly
PDF, 99 Kb, 修订版: C, 档案已发布: Jun 30, 2001
The TMS320C6000? (C6000?) Multichannel Buffered Serial Port (McBSP) is designed to interface to a device that supports synchronous Serial Peripheral Interface (SPI). This document describes the hardware interface between the McBSP and a SPI ROM. The McBSP operates as the master in a user-specified clock stop (CLKSTP) mode in order to communicate with the SPI ROM. The McBSP initialization and contr
PDF, 150 Kb, 档案已发布: Feb 2, 2000
This document describes how to perform data companding with the TMS320C6000(tm)digital signal processors(DSP). Companding refers to the compression and expansion of transfer data before and after transmission, respectively.The multichannel buffered serial port (McBSP) in the TMS320C6000 supports two companding formats: mu-Law and A-Law. Both companding formats are specified in the CCITT G.711
PDF, 96 Kb, 修订版: C, 档案已发布: Apr 21, 2004
PDF, 313 Kb, 修订版: A, 档案已发布: Sep 11, 2000
This document describes how the multichannel buffered serial ports (McBSP) in the TMS320C6000в„ў digital signal processors (DSP) are used to communicate on a time-division multiplexed (TDM) data highway.TDM provides multiple devices a time slot to perform data transfer. Thus, multiple users operate various channels; however, each user has a set of channel(s) assigned for transmission and re
PDF, 87 Kb, 修订版: B, 档案已发布: Jun 4, 2002
This document describes how the multichannel buffered serial ports (McBSPs) in the Texas Instruments TMS320C6000в„ў digital signal processor (DSP) are used to communicate to a single-rate Serial Telecom (ST)-BUS-compliant device.The McBSP receives the framing signal, clock, and data from the ST-BUSв„ў device and processes them to generate internal frame syncs and clocks for correct data
PDF, 296 Kb, 修订版: A, 档案已发布: Aug 31, 2001
This document describes how to use the mulit-channel buffered serial ports (McBSP) in the Texas Instruments (TI) TMS320C6000в„ў digital signal processor (DSP) as a high-speed data communication port.One McBSP of one C6000в„ў DSP device can be connected to a McBSP on another C6000 DSP device to serve as a high-speed data communication port. Typically, McBSPs of similar device numbers a
PDF, 301 Kb, 修订版: A, 档案已发布: Apr 15, 2003
Today?s high-speed interfaces require strict timings and accurate system design. To achieve the necessary timings for a given system, input/output buffer information specification (IBIS) models must be used. These models accurately represent the device drivers under various process conditions. Board characteristics, such as impedance, loading, length, number of nodes, etc., affect how the device d
PDF, 127 Kb, 档案已发布: May 20, 2007
As integrated circuit (IC) components become more complex, the challenge of producing an end product with superior thermal performance increases. Thermal performance is a system level concern, impacted by IC packaging as well as by printed circuit board (PCB) design. This application report addresses the thermal considerations for the TMS320DM64xx, TMS320DM64x, and TMS320C6000в„ў DSP devices.
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- Semiconductors > Processors > Digital Signal Processors > C6000 DSP > Other C6000 DSP
