Datasheet Texas Instruments ADS8382IRHPT — 数据表

制造商Texas Instruments
系列ADS8382
零件号ADS8382IRHPT
Datasheet Texas Instruments ADS8382IRHPT

具有参考和伪双极性,全差分输入28-VQFN的18位600KSPS串行ADC -40至85

数据表

ADS8382: 18-Bit 600-kHz Unipolar Differential Input Micropower Sampling ADC datasheet
PDF, 1.7 Mb, 修订版: B, 档案已发布: Nov 3, 2004
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin28
Package TypeRHP
Industry STD TermVQFN
JEDEC CodeS-PQFP-N
Package QTY250
CarrierSMALL T&R
Device MarkingADS8382I
Width (mm)6
Length (mm)6
Thickness (mm).9
Pitch (mm).65
Max Height (mm)1
Mechanical Data下载

参数化

# Input Channels1
Analog Voltage AVDD(Max)5.25 V
Analog Voltage AVDD(Min)4.75 V
ArchitectureSAR
Digital Supply(Max)5.25 V
Digital Supply(Min)2.7 V
INL(Max)3 +/-LSB
Input Range(Max)4.2 V
Input Range(Min)-4.2 V
Input TypeDifferential
Integrated FeaturesOscillator
InterfaceSPI
Multi-Channel ConfigurationN/A
Operating Temperature Range-40 to 85 C
Package GroupVQFN
Package Size: mm2:W x L28VQFN: 36 mm2: 6 x 6(VQFN) PKG
Power Consumption(Typ)115 mW
RatingCatalog
Reference ModeExt,Int
Resolution18 Bits
SINAD96 dB
SNR96 dB
Sample Rate (max)600kSPS SPS
Sample Rate(Max)0.6 MSPS
THD(Typ)-116 dB

生态计划

RoHSCompliant

设计套件和评估模块

  • Evaluation Modules & Boards: ADS8382EVM
    ADS8382 Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

应用须知

  • Using the ADS8382 With the TMS320C6713 DSP
    PDF, 193 Kb, 档案已发布: Mar 24, 2005
    This application report presents a solution to interfacing the ADS8382 18-bit, 600-KSPS serial interface converter to the TMS320C6713 DSP. The hardware solution is made up of existing hardware: the ADS8382EVM, 'C6713 DSK, and 5-6K Interface Board. The software demonstrates how to use an EDMA and Timer peripheral to collect data at 598 kHz. Discussed also are some of the key points to remember when
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

模型线

系列: ADS8382 (3)

制造商分类

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)