Datasheet Texas Instruments ADS8361IRHBT — 数据表
制造商 | Texas Instruments |
系列 | ADS8361 |
零件号 | ADS8361IRHBT |
16位500 kSPS 2个ADC,4通道,串行输出32-VQFN -40至125
数据表
Dual, 500kSPS, 16-Bit, 2+2 Channel, Simultaneous Sampling A/D Converter datasheet
PDF, 1.1 Mb, 修订版: E, 档案已发布: Aug 14, 2007
从文件中提取
价格
状态
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | Yes |
打包
Pin | 32 | 32 |
Package Type | RHB | RHB |
Industry STD Term | VQFN | VQFN |
JEDEC Code | S-PQFP-N | S-PQFP-N |
Package QTY | 250 | 250 |
Carrier | SMALL T&R | SMALL T&R |
Device Marking | 8361I | ADS |
Width (mm) | 5 | 5 |
Length (mm) | 5 | 5 |
Thickness (mm) | .9 | .9 |
Pitch (mm) | .5 | .5 |
Max Height (mm) | 1 | 1 |
Mechanical Data | 下载 | 下载 |
参数化
# Input Channels | 4 |
Analog Voltage AVDD(Max) | 5.25 V |
Analog Voltage AVDD(Min) | 4.75 V |
Architecture | SAR |
Digital Supply(Max) | 5.5 V |
Digital Supply(Min) | 2.7 V |
INL(Max) | 8 +/-LSB |
Input Range(Max) | 5.25 V |
Input Type | Differential |
Integrated Features | N/A |
Interface | Serial |
Multi-Channel Configuration | Simultaneous Sampling |
Operating Temperature Range | -40 to 125 C |
Package Group | VQFN |
Package Size: mm2:W x L | 32VQFN: 25 mm2: 5 x 5(VQFN) PKG |
Power Consumption(Typ) | 150 mW |
Rating | Catalog |
Reference Mode | Ext,Int |
Resolution | 16 Bits |
SINAD | 83 dB |
SNR | 83 dB |
Sample Rate (max) | 500kSPS SPS |
Sample Rate(Max) | 0.5 MSPS |
THD(Typ) | -94 dB |
生态计划
RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: ADS8361EVM
ADS8361 Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: 5-6KINTERFACE
5-6K Interface Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
应用须知
- Using the ADS8361 with the MSP430 USI portPDF, 218 Kb, 档案已发布: Jul 17, 2006
- Interfacing the ADS8361 to TMS470 ProcessorsPDF, 95 Kb, 档案已发布: Jul 19, 2006
This application report presents methods of interfacing the ADS8361 16-bit SAR analog-to-digital converter to the serial peripheral interface (SPI) port of TMS470 processors. The flexible clocking scheme of the TMS470 SPI port, along with its internal 16-bit shift register, provides an easy hardware/software interface to this high-speed simultaneous sampling SAR converter for a variety of motor co - Interfacing the ADS8361 to the TMS320C6711 DSPPDF, 51 Kb, 档案已发布: Feb 4, 2003
This application report presents a method for interfacing the ADS8361 16-bit SAR analog-to-digital converter to the TMS320C6711 DSP using McBSP1. The software developed reads 1024 samples continuously from the ADS8361. In an effort to reduce development time, the source code for this application note can be found on the Texas Instruments web site at http://www.ti.com. Search for document number - Interfacing the ADS8361 to the TMS320VC5416 DSPPDF, 59 Kb, 档案已发布: Dec 5, 2002
This application note presents a method for interfacing the ADS8361 16-bit SAR analog-to-digital converter to the TMS320VC5416в„ў DSP using McBSP1. The software developed reads 1024 samples continuously from the ADS8361. In an effort to reduce development time, the source code for this application note can be found on the Texas Instruments web site at http://www.ti.com. Search for document - Interfacing the ADS8361 to the TMS320F2812 DSPPDF, 111 Kb, 档案已发布: Feb 10, 2003
This application note presents several methods for interfacing the ADS8361 16-bit SAR analog-to-digital converter to the TMS320F2812DSP. The software developed for this application note uses both the McBSP and SPI port to highlight the flexible digital interface of the ADS8361. In an effort to reduce development time, the source code for this application note can be found on the Texas Instrument - Using a SAR A/D Converter for Current Measurement in Motor Control Applications (Rev. A)PDF, 405 Kb, 修订版: A, 档案已发布: May 18, 2015
- Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
模型线
系列: ADS8361 (6)
- ADS8361IDBQ ADS8361IDBQG4 ADS8361IDBQR ADS8361IDBQRG4 ADS8361IRHBR ADS8361IRHBT
制造商分类
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)