[ /Title
(CD74
HC390
,
CD74
HCT39
0)
/Subject
(High
Speed
CMOS CD74HC390,
CD54HCT390, CD74HCT390
Data sheet acquired from Harris Semiconductor
SCHS185C High-Speed CMOS Logic
Dual Decade Ripple Counter September 1997 -Revised October 2003 Features Description Two BCD Decade or Bi-Quinary Counters The CD74HC390 and ’HCT390 dual 4-bit decade ripple
counters are high-speed silicon-gate CMOS devices and are
pin compatible with low-power Schottky TTL (LSTTL). These
devices are divided into four separately clocked sections.
The counters have two divide-by-2 sections and two divideby-5 sections. These sections are normally used in a BCD
decade or bi-quinary configuration, since they share a common master reset (nMR). If the two master reset inputs (1MR
and 2MR) are used to simultaneously clear all 8 bits of the
counter, a number of counting configurations are possible
within one package. The separate clock inputs (nCP0 and …
