Datasheet Texas Instruments SN74AVC1T45DBVRG4 — 数据表
| 制造商 | Texas Instruments |
| 系列 | SN74AVC1T45 |
| 零件号 | SN74AVC1T45DBVRG4 |
具有可配置电压电平转换和三态输出的单位双电源总线收发器6-SOT-23 -40至85
数据表
SN74AVC1T45 Single-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs datasheet
PDF, 1.2 Mb, 修订版: H, 档案已发布: Dec 23, 2014
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
打包
| Pin | 6 | 6 | 6 | 6 |
| Package Type | DBV | DBV | DBV | DBV |
| Industry STD Term | SOT-23 | SOT-23 | SOT-23 | SOT-23 |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 3000 | 3000 | 3000 | 3000 |
| Carrier | LARGE T&R | LARGE T&R | LARGE T&R | LARGE T&R |
| Device Marking | DT1R | DT1H | DT1F | DT1P |
| Width (mm) | 1.6 | 1.6 | 1.6 | 1.6 |
| Length (mm) | 2.9 | 2.9 | 2.9 | 2.9 |
| Thickness (mm) | 1.2 | 1.2 | 1.2 | 1.2 |
| Pitch (mm) | .95 | .95 | .95 | .95 |
| Max Height (mm) | 1.45 | 1.45 | 1.45 | 1.45 |
| Mechanical Data | 下载 | 下载 | 下载 | 下载 |
参数化
| 3-State Output | Yes |
| Bits | 1 |
| F @ Nom Voltage(Max) | 100 Mhz |
| Gate Type | TRANSCEIVER |
| ICC @ Nom Voltage(Max) | 0.0009 mA |
| Logic | True |
| Operating Temperature Range | -40 to 85 C |
| Output Drive (IOL/IOH)(Max) | 4/-4 mA |
| Package Group | SOT-23 |
| Package Size: mm2:W x L | 6SOT-23: 8 mm2: 2.8 x 2.9(SOT-23) PKG |
| Rating | Catalog |
| Schmitt Trigger | No |
| Special Features | IOFF,Dual Supply,Translation |
| Sub-Family | Dual Supply Translator |
| Technology Family | AVC |
| VCC(Max) | 3.6 V |
| VCC(Min) | 1.2 V |
| Voltage(Nom) | 1.2,1.5,1.8,2.5,3.3 V |
| tpd @ Nom Voltage(Max) | 2.9,5.6,5.2,4.2,3.8 ns |
生态计划
| RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: CDCI6214EVM
CDCI6214 Ultra-Low Power Clock Generator Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: DLPLCR6500EVM
DLPВ® LightCrafterВ™ 6500 Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: DLPLCR9000EVM
DLPВ® LightCrafterВ™ 9000 Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: AVCLVCDIRCNTRL-EVM
Generic EVM for Direction-Controlled Bidirectional Translation Device Supporting AVC and LVC
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: DLPLCR4500EVM
DLPВ® LightCrafterВ™ 4500
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: EVMX777BG-01-00-00
J6Entry, RSP and TDA2E-17 CPU Board Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: EVMK2G
66AK2Gx (K2G) Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: EVMX777G-01-20-00
J6Entry/RSP Infotainment (CPU+Display+JAMR3) Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
应用须知
- Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)PDF, 126 Kb, 修订版: B, 档案已发布: Jul 7, 1999
Texas Instruments (TI[TM]) next-generation logic is called the Advanced Very-low-voltage CMOS (AVC) family. The AVCfamily features TI?s Dynamic Output Control (DOC[TM]) circuit (patent pending). DOC circuitry automatically lowers the outputimpedance of the circuit at the beginning of a signal transition, providing enough current to achieve high signaling speeds, thensubsequently raises the i - AVC Logic Family Technology and Applications (Rev. A)PDF, 148 Kb, 修订版: A, 档案已发布: Aug 26, 1998
Texas Instruments (TI?) announces the industry?s first logic family to achieve maximum propagation delays of less than 2 ns at 2.5 V. TI?s next-generation logic is the Advanced Very-low-voltage CMOS (AVC) family. Although optimized for 2.5-V systems, AVC logic supports mixed-voltage systems because it is compatible with 3.3-V and 1.8-V devices. The AVC family features TI?s Dynamic Output Control ( - Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)PDF, 390 Kb, 修订版: B, 档案已发布: Apr 30, 2015
- 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
模型线
系列: SN74AVC1T45 (14)
制造商分类
- Semiconductors > Logic > Little Logic