Datasheet Texas Instruments ADS7924IRTET — 数据表

制造商	Texas Instruments
系列	ADS7924
零件号	ADS7924IRTET

具有智能系统电源控制的12位4通道MUX输入SAR ADC 16-WQFN -40至85

数据表

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PDF, 1.3 Mb, 修订版: C, 档案已发布: Sep 15, 2017

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价格

状态

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

打包

Pin	16
Package Type	RTE
Industry STD Term	WQFN
JEDEC Code	S-PQFP-N
Package QTY	250
Carrier	SMALL T&R
Device Marking	7924
Width (mm)	3
Length (mm)	3
Thickness (mm)	.75
Pitch (mm)	.5
Max Height (mm)	.8
Mechanical Data	下载

参数化

# Input Channels	4
Analog Voltage AVDD(Max)	5.5 V
Analog Voltage AVDD(Min)	2.2 V
Architecture	SAR
Digital Supply(Max)	5.5 V
Digital Supply(Min)	1.65 V
INL(Max)	1.5 +/-LSB
Input Range(Max)	5.5 V
Input Type	Single-Ended
Integrated Features	Oscillator
Interface	I2C
Multi-Channel Configuration	Multiplexed
Operating Temperature Range	-40 to 85 C
Package Group	WQFN
Package Size: mm2:W x L	16WQFN: 9 mm2: 3 x 3(WQFN) PKG
Power Consumption(Typ)	0.5 mW
Rating	Catalog
Reference Mode	Supply
Resolution	12 Bits
SINAD	N/A dB
Sample Rate (max)	100kSPS SPS
Sample Rate(Max)	0.1 MSPS
THD(Typ)	N/A dB

生态计划

RoHS

Compliant

设计套件和评估模块

Evaluation Modules & Boards: ADS7924EVM
ADS7924 Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
- 下载
Evaluation Modules & Boards: ADS7924EVM-PDK
ADS7924 Performance Demonstration Kit
Lifecycle Status: Active (Recommended for new designs)
- 下载

应用须知

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Obtaining 17 Bits of Resolution using a 12-Bit A/D System on a Chip
PDF, 337 Kb, 档案已发布: Jun 24, 2010
Integrated data acquisition systems can provide many benefits over discrete component designs. Superior performance, power, and cost savings, along with shorter development times, are among these benefits. Features such as integrated programmable gain amplifiers and averaging can provide added resolution. This application note includes information on how to achieve 17 bits of effective resolution
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Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
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Determining Minimum Acquisition Times for SAR ADCs, part 2
PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
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Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
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A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
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Principles of Data Acquisition and Conversion (Rev. A)
PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015

模型线

系列: ADS7924 (2)

ADS7924IRTER ADS7924IRTET

制造商分类

Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)