Datasheet Texas Instruments 74ACT11074DBLE — 数据表
制造商 | Texas Instruments |
系列 | 74ACT11074 |
零件号 | 74ACT11074DBLE |
具有清零和预置14-SSOP的双路触发边沿D型触发器-40至85
数据表
Dual D-Type Positive-Edge-Triggered Flip Flop With Clear And Preset datasheet
PDF, 877 Kb, 修订版: A, 档案已发布: Apr 1, 1996
从文件中提取
价格
状态
Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
Manufacture's Sample Availability | No |
打包
Pin | 14 |
Package Type | DB |
Industry STD Term | SSOP |
JEDEC Code | R-PDSO-G |
Width (mm) | 5.3 |
Length (mm) | 6.2 |
Thickness (mm) | 1.95 |
Pitch (mm) | .65 |
Max Height (mm) | 2 |
Mechanical Data | 下载 |
参数化
3-State Output | No |
Approx. Price (US$) | 0.94 | 1ku |
Bits(#) | 2 |
F @ Nom Voltage(Max)(Mhz) | 90 |
ICC @ Nom Voltage(Max)(mA) | 0.04 |
Input Type | TTL |
Operating Temperature Range(C) | -40 to 85 |
Output Drive (IOL/IOH)(Max)(mA) | 24/-24 |
Output Type | CMOS |
Package Group | SSOP |
Package Size: mm2:W x L (PKG) | See datasheet (PDIP) |
Rating | Catalog |
Schmitt Trigger | No |
Technology Family | ACT |
VCC(Max)(V) | 5.5 |
VCC(Min)(V) | 4.5 |
Voltage(Nom)(V) | 5 |
tpd @ Nom Voltage(Max)(ns) | 9.4 |
生态计划
RoHS | Not Compliant |
Pb Free | No |
应用须知
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- CMOS Power Consumption and CPD Calculation (Rev. B)PDF, 89 Kb, 修订版: B, 档案已发布: Jun 1, 1997
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- Designing With Logic (Rev. C)PDF, 186 Kb, 修订版: C, 档案已发布: Jun 1, 1997
Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w - Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, 修订版: A, 档案已发布: Feb 6, 2015
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple VccPDF, 43 Kb, 档案已发布: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
模型线
系列: 74ACT11074 (6)
- 74ACT11074D 74ACT11074DBLE 74ACT11074DBR 74ACT11074DG4 74ACT11074N 74ACT11074NSR
制造商分类
- Semiconductors > Logic > Flip-Flop/Latch/Register > D-Type Flip-Flop