Datasheet Texas Instruments PADS5546IRGZT — 数据表
| 制造商 | Texas Instruments |
| 系列 | ADS5546 |
| 零件号 | PADS5546IRGZT |
14位190MSPS模数转换器（ADC）48VQFN -40至85
数据表
14-Bits 190 MSPS ADC With DDR LVDS/CMOS Outputs datasheet
PDF, 2.1 Mb, 修订版: D, 档案已发布: May 7, 2007
从文件中提取
价格
状态
| Lifecycle Status | Preview (Device has been announced but is not in production. Samples may or may not be available) |
| Manufacture's Sample Availability | No |
打包
| Pin | 48 |
| Package Type | RGZ |
| Industry STD Term | VQFN |
| JEDEC Code | S-PQFP-N |
| Width (mm) | 7 |
| Length (mm) | 7 |
| Thickness (mm) | .9 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1 |
| Mechanical Data | 下载 |
参数化
| # Input Channels | 1 |
| Analog Input BW(MHz) | 500 |
| Approx. Price (US$) | 116.49 | 100u |
| Architecture | Pipeline |
| DNL(Max)(+/-LSB) | 0.5 |
| DNL(Typ)(+/-LSB) | 0.5 |
| ENOB(Bits) | 11.8 |
| INL(Max)(+/-LSB) | 3 |
| INL(Typ)(+/-LSB) | 3 |
| Input Buffer | No |
| Input Range(Vp-p) | 2 |
| Interface | Parallel CMOS Parallel LVDS |
| Operating Temperature Range(C) | -40 to 85 |
| Package Group | VQFN |
| Package Size: mm2:W x L (PKG) | 48VQFN: 49 mm2: 7 x 7(VQFN) |
| Power Consumption(Typ)(mW) | 1130 |
| Rating | Catalog |
| Reference Mode | Ext Int |
| Resolution(Bits) | 14 |
| SFDR(dB) | 87 |
| SINAD(dB) | 72.8 |
| SNR(dB) | 73.5 |
| Sample Rate(Max)(MSPS) | 190 |
生态计划
| RoHS | Not Compliant |
| Pb Free | No |
设计套件和评估模块
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应用须知
- QFN Layout GuidelinesPDF, 1.3 Mb, 档案已发布: Jul 28, 2006
Board layout and stencil information for most Texas Instruments Quad Flat No-Lead (QFN) devices is provided in their data sheets. This document helps printed-circuit board designers understand and better use this information for optimal designs. - CDCE62005 as Clock Solution for High-Speed ADCsPDF, 805 Kb, 档案已发布: Sep 4, 2008
TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements - Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)PDF, 1.2 Mb, 修订版: A, 档案已发布: Jul 19, 2013
- Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)PDF, 2.0 Mb, 修订版: A, 档案已发布: May 22, 2015
- Smart Selection of ADC/DAC Enables Better Design of Software-Defined RadioPDF, 376 Kb, 档案已发布: Apr 28, 2009
This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs. - Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)PDF, 327 Kb, 修订版: A, 档案已发布: Sep 10, 2010
This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir - Phase Noise Performance and Jitter Cleaning Ability of CDCE72010PDF, 2.3 Mb, 档案已发布: Jun 2, 2008
This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig - CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital ConvertersPDF, 424 Kb, 档案已发布: Jun 8, 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
模型线
系列: ADS5546 (2)
- ADS5546IRGZT PADS5546IRGZT
制造商分类
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)