Datasheet Texas Instruments ADS8201IRGER — 数据表

制造商Texas Instruments
系列ADS8201
零件号ADS8201IRGER
Datasheet Texas Instruments ADS8201IRGER

具有PGA和SPI™24-VQFN的2.2V至5.5V,低功耗,12位,100kSPS,8通道DAS -40至85

数据表

2.2V to 5.5V, Low-Power, 12-Bit, 100kSPS, 8-Ch Data Acq System with PGA and SPI datasheet
PDF, 771 Kb, 修订版: B, 档案已发布: May 10, 2010
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin2424
Package TypeRGERGE
Industry STD TermVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-N
Package QTY30003000
CarrierLARGE T&RLARGE T&R
Device Marking8201ADS
Width (mm)44
Length (mm)44
Thickness (mm).88.88
Pitch (mm).5.5
Max Height (mm)11
Mechanical Data下载下载

参数化

# Input Channels8
Analog Voltage AVDD(Max)5.5 V
Analog Voltage AVDD(Min)2.2 V
ArchitectureSAR
Digital Supply(Max)5.5 V
Digital Supply(Min)2.2 V
INL(Max)1.5 +/-LSB
Input Range(Max)5.5 V
Input TypeDifferential,Single-Ended
Integrated FeaturesOscillator,PGA
InterfaceSPI
Multi-Channel ConfigurationMultiplexed
Operating Temperature Range-40 to 85 C
Package GroupVQFN
Package Size: mm2:W x L24VQFN: 16 mm2: 4 x 4(VQFN) PKG
Power Consumption(Typ)1.32 mW
RatingCatalog
Reference ModeExt
Resolution12 Bits
SINADN/A dB
Sample Rate (max)100kSPS SPS
Sample Rate(Max)0.1 MSPS
THD(Typ)N/A dB

生态计划

RoHSCompliant

应用须知

  • Obtaining 17 Bits of Resolution using a 12-Bit A/D System on a Chip
    PDF, 337 Kb, 档案已发布: Jun 24, 2010
    Integrated data acquisition systems can provide many benefits over discrete component designs. Superior performance, power, and cost savings, along with shorter development times, are among these benefits. Features such as integrated programmable gain amplifiers and averaging can provide added resolution. This application note includes information on how to achieve 17 bits of effective resolution
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015

模型线

制造商分类

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)