Datasheet Texas Instruments ADS8383IBPFBT — 数据表
| 制造商 | Texas Instruments |
| 系列 | ADS8383 |
| 零件号 | ADS8383IBPFBT |
18位500KSPS并行ADC 48-TQFP -40至85
数据表
18-Bit, 500-kHz, Unipolar Input, Micropower Sampling ADC Converter datasheet
PDF, 926 Kb, 修订版: C, 档案已发布: Feb 14, 2005
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价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 48 | 48 |
| Package Type | PFB | PFB |
| Industry STD Term | TQFP | TQFP |
| JEDEC Code | S-PQFP-G | S-PQFP-G |
| Package QTY | 250 | 250 |
| Carrier | SMALL T&R | SMALL T&R |
| Device Marking | ADS8383I | B |
| Width (mm) | 7 | 7 |
| Length (mm) | 7 | 7 |
| Thickness (mm) | 1 | 1 |
| Pitch (mm) | .5 | .5 |
| Max Height (mm) | 1.2 | 1.2 |
| Mechanical Data | 下载 | 下载 |
参数化
| # Input Channels | 1 |
| Analog Voltage AVDD(Max) | 5.25 V |
| Analog Voltage AVDD(Min) | 4.75 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.25 V |
| Digital Supply(Min) | 2.95 V |
| INL(Max) | 4 +/-LSB |
| Input Range(Max) | 4.2 V |
| Input Type | Pseudo-Differential,Single-Ended |
| Integrated Features | Oscillator |
| Interface | SPI |
| Multi-Channel Configuration | N/A |
| Operating Temperature Range | -40 to 85 C |
| Package Group | TQFP |
| Package Size: mm2:W x L | 48TQFP: 81 mm2: 9 x 9(TQFP) PKG |
| Power Consumption(Typ) | 110 mW |
| Rating | Catalog |
| Reference Mode | Ext |
| Resolution | 18 Bits |
| SINAD | 87 dB |
| SNR | 88 dB |
| Sample Rate (max) | 500kSPS SPS |
| Sample Rate(Max) | 0.5 MSPS |
| THD(Typ) | -112 dB |
生态计划
| RoHS | Compliant |
应用须知
- Interfacing the ADS8383 to TMS320C6711 DSPPDF, 1.3 Mb, 档案已发布: Jun 4, 2003
This application note presents a software and hardware interface of the ADS8383 18-bit 500 kHz analog-to-digital converter to the TMS320C6711 DSP. The hardware platform used to develop this application is ADS8383EVM and TMS320C6711 DSK. The software developed reads 1024 blocks of samples continuously from ADS8383. In an effort to reduce development time, the source code is available on TI's websit - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
模型线
系列: ADS8383 (1)
- ADS8383IBPFBT
制造商分类
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)